Lines Matching defs:LI
213 bool LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
215 assert(LI.empty() && "Should only compute empty intervals.");
217 LICalc->calculate(LI, MRI->shouldTrackSubRegLiveness(LI.reg()));
218 return computeDeadValues(LI, nullptr);
226 LiveInterval &LI = createEmptyInterval(Reg);
227 bool NeedSplit = computeVirtRegInterval(LI);
230 splitSeparateComponents(LI, SplitLIs);
356 for (const auto &LI : MBB.liveins()) {
357 for (MCRegUnit Unit : TRI->regunits(LI.PhysReg)) {
409 const LiveInterval &LI = getInterval(Reg);
410 const LiveRange &OldRange = getSubRange(LI, LaneMask);
460 LI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes);
527 bool LiveIntervals::computeDeadValues(LiveInterval &LI,
531 for (VNInfo *VNI : LI.valnos) {
535 LiveRange::iterator I = LI.FindSegmentContaining(Def);
536 assert(I != LI.end() && "Missing segment for VNI");
540 Register VReg = LI.reg();
542 if ((I == LI.begin() || std::prev(I)->end < Def) && !VNI->isPHIDef()) {
553 LI.removeSegment(I);
559 MI->addRegisterDead(LI.reg(), TRI);
719 const LiveInterval &LI = getInterval(Reg);
720 if (LI.empty())
735 RU.push_back(std::make_pair(&RURange, RURange.find(LI.begin()->end)));
739 for (LiveInterval::const_iterator RI = LI.begin(), RE = LI.end(); RI != RE;
781 if (LI.hasSubRanges()) {
784 for (const LiveInterval::SubRange &SR : LI.subranges())
821 if (N != LI.end() && N->start == RI->end)
835 LiveIntervals::intervalIsInOneMBB(const LiveInterval &LI) const {
836 assert(!LI.empty() && "LiveInterval is empty.");
845 SlotIndex Start = LI.beginIndex();
849 SlotIndex Stop = LI.endIndex();
861 LiveIntervals::hasPHIKill(const LiveInterval &LI, const VNInfo *VNI) const {
862 for (const VNInfo *PHI : LI.valnos) {
870 if (VNI == LI.getVNInfoBefore(Indexes->getMBBEndIdx(Pred)))
922 bool LiveIntervals::checkRegMaskInterference(const LiveInterval &LI,
924 if (LI.empty())
926 LiveInterval::const_iterator LiveI = LI.begin(), LiveE = LI.end();
931 if (MachineBasicBlock *MBB = intervalIsInOneMBB(LI)) {
939 // We are going to enumerate all the register mask slots contained in LI.
944 // No slots in range, LI begins after the last call.
964 // *SlotI overlaps LI. Collect mask bits.
972 if (hasLiveThroughUse(MI, LI.reg()))
974 // *SlotI is beyond the current LI segment.
976 if (++LiveI == LiveE || SlotI == SlotE || *SlotI > LI.endIndex())
1042 LiveInterval &LI = LIS.getInterval(Reg);
1043 if (LI.hasSubRanges()) {
1047 for (LiveInterval::SubRange &S : LI.subranges()) {
1053 updateRange(LI, Reg, LaneBitmask::getNone());
1060 if (LI.hasSubRanges()) {
1064 for (LiveInterval::SubRange &S : LI.subranges()) {
1065 if ((S.LaneMask & LaneMask).none() || LI.covers(S))
1067 LI.clear();
1068 LIS.constructMainRangeFromSubranges(LI);
1569 LiveInterval &LI = getInterval(Reg);
1570 LiveQueryResult LRQ = LI.Query(Index);
1695 LiveInterval &LI = getInterval(Reg);
1696 if (!LI.hasSubRanges()) {
1706 if (llvm::none_of(LI.subranges(),
1727 LiveInterval &LI = getInterval(Reg);
1729 if (!LI.hasAtLeastOneValue())
1732 for (LiveInterval::SubRange &S : LI.subranges())
1734 LI.removeEmptySubRanges();
1736 repairOldRegInRange(Begin, End, EndIdx, LI, Reg);
1748 void LiveIntervals::removeVRegDefAt(LiveInterval &LI, SlotIndex Pos) {
1749 // LI may not have the main range computed yet, but its subranges may
1751 VNInfo *VNI = LI.getVNInfoAt(Pos);
1754 LI.removeValNo(VNI);
1758 for (LiveInterval::SubRange &S : LI.subranges()) {
1763 LI.removeEmptySubRanges();
1766 void LiveIntervals::splitSeparateComponents(LiveInterval &LI,
1769 unsigned NumComp = ConEQ.Classify(LI);
1772 LLVM_DEBUG(dbgs() << " Split " << NumComp << " components: " << LI << '\n');
1773 Register Reg = LI.reg();
1779 ConEQ.Distribute(LI, SplitLIs.data(), *MRI);
1782 void LiveIntervals::constructMainRangeFromSubranges(LiveInterval &LI) {
1785 LICalc->constructMainRangeFromSubranges(LI);