Lines Matching defs:Addr

403                                        Register Addr, Register AddrDisc) {
406   MIB.addUse(Addr);
424 MachineIRBuilder::buildLoad(const DstOp &Dst, const SrcOp &Addr,
434   return buildLoad(Dst, Addr, *MMO);
439                                                      const SrcOp &Addr,
442   assert(Addr.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
446   Addr.addSrcToMIB(MIB);
469                                                  const SrcOp &Addr,
472   assert(Addr.getLLTTy(*getMRI()).isPointer() && "invalid operand type");
476   Addr.addSrcToMIB(MIB);
482 MachineIRBuilder::buildStore(const SrcOp &Val, const SrcOp &Addr,
492   return buildStore(Val, Addr, *MMO);
962     const DstOp &OldValRes, const DstOp &SuccessRes, const SrcOp &Addr,
967   LLT AddrTy = Addr.getLLTTy(*getMRI());
982   Addr.addSrcToMIB(MIB);
990 MachineIRBuilder::buildAtomicCmpXchg(const DstOp &OldValRes, const SrcOp &Addr,
995   LLT AddrTy = Addr.getLLTTy(*getMRI());
1008   Addr.addSrcToMIB(MIB);
1017   const SrcOp &Addr, const SrcOp &Val,
1022   LLT AddrTy = Addr.getLLTTy(*getMRI());
1032   Addr.addSrcToMIB(MIB);
1039 MachineIRBuilder::buildAtomicRMWXchg(Register OldValRes, Register Addr,
1041   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_XCHG, OldValRes, Addr, Val,
1045 MachineIRBuilder::buildAtomicRMWAdd(Register OldValRes, Register Addr,
1047   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_ADD, OldValRes, Addr, Val,
1051 MachineIRBuilder::buildAtomicRMWSub(Register OldValRes, Register Addr,
1053   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_SUB, OldValRes, Addr, Val,
1057 MachineIRBuilder::buildAtomicRMWAnd(Register OldValRes, Register Addr,
1059   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_AND, OldValRes, Addr, Val,
1063 MachineIRBuilder::buildAtomicRMWNand(Register OldValRes, Register Addr,
1065   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_NAND, OldValRes, Addr, Val,
1069                                                        Register Addr,
1072   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_OR, OldValRes, Addr, Val,
1076 MachineIRBuilder::buildAtomicRMWXor(Register OldValRes, Register Addr,
1078   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_XOR, OldValRes, Addr, Val,
1082 MachineIRBuilder::buildAtomicRMWMax(Register OldValRes, Register Addr,
1084   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_MAX, OldValRes, Addr, Val,
1088 MachineIRBuilder::buildAtomicRMWMin(Register OldValRes, Register Addr,
1090   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_MIN, OldValRes, Addr, Val,
1094 MachineIRBuilder::buildAtomicRMWUmax(Register OldValRes, Register Addr,
1096   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_UMAX, OldValRes, Addr, Val,
1100 MachineIRBuilder::buildAtomicRMWUmin(Register OldValRes, Register Addr,
1102   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_UMIN, OldValRes, Addr, Val,
1108   const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
1110   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_FADD, OldValRes, Addr, Val,
1115 MachineIRBuilder::buildAtomicRMWFSub(const DstOp &OldValRes, const SrcOp &Addr, const SrcOp &Val,
1117   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_FSUB, OldValRes, Addr, Val,
1122 MachineIRBuilder::buildAtomicRMWFMax(const DstOp &OldValRes, const SrcOp &Addr,
1124   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_FMAX, OldValRes, Addr, Val,
1129 MachineIRBuilder::buildAtomicRMWFMin(const DstOp &OldValRes, const SrcOp &Addr,
1131   return buildAtomicRMW(TargetOpcode::G_ATOMICRMW_FMIN, OldValRes, Addr, Val,
1142 MachineInstrBuilder MachineIRBuilder::buildPrefetch(const SrcOp &Addr,
1148   Addr.addSrcToMIB(MIB);