Lines Matching defs:WideTy
1782 void LegalizerHelper::widenScalarSrc(MachineInstr &MI, LLT WideTy,
1785 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO});
1796 void LegalizerHelper::widenScalarDst(MachineInstr &MI, LLT WideTy,
1799 Register DstExt = MRI.createGenericVirtualRegister(WideTy);
1814 void LegalizerHelper::moreElementsVectorDst(MachineInstr &MI, LLT WideTy,
1819 Register DstExt = MRI.createGenericVirtualRegister(WideTy);
1846 LLT WideTy) {
1857 const int WideSize = WideTy.getSizeInBits();
1866 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1Reg).getReg(0);
1874 auto ZextInput = MIRBuilder.buildZExt(WideTy, SrcReg);
1876 Register NextResult = I + 1 == NumOps && WideTy == DstTy ? DstReg :
1877 MRI.createGenericVirtualRegister(WideTy);
1879 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset);
1880 auto Shl = MIRBuilder.buildShl(WideTy, ZextInput, ShiftAmt);
1948 MIRBuilder.buildMergeLikeInstr(WideTy, Slicer.take_front(PartsPerGCD));
1967 LLT WideTy) {
1982 if (WideTy.getSizeInBits() >= SrcTy.getSizeInBits()) {
1995 // Widen SrcTy to WideTy. This does not affect the result, but since the
1998 if (WideTy.getSizeInBits() > SrcTy.getSizeInBits()) {
1999 SrcTy = WideTy;
2000 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0);
2019 LLT LCMTy = getLCMType(SrcTy, WideTy);
2032 auto Unmerge = MIRBuilder.buildUnmerge(WideTy, WideSrc);
2049 const LLT GCDTy = getGCDType(WideTy, DstTy);
2056 const int PartsPerUnmerge = WideTy.getSizeInBits() / DstTy.getSizeInBits();
2096 LLT WideTy) {
2123 MIRBuilder.buildAnyExtOrTrunc(WideTy, Src));
2130 if (WideTy.getSizeInBits() > SrcTy.getSizeInBits()) {
2131 Src = MIRBuilder.buildAnyExt(WideTy, Src);
2132 ShiftTy = WideTy;
2144 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2159 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2161 MI.getOperand(2).setImm((WideTy.getSizeInBits() / SrcTy.getSizeInBits()) *
2163 widenScalarDst(MI, WideTy.getScalarType(), 0);
2170 LLT WideTy) {
2171 if (TypeIdx != 0 || WideTy.isVector())
2174 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2175 widenScalarDst(MI, WideTy);
2182 LLT WideTy) {
2228 unsigned BoolExtOp = MIRBuilder.getBoolExtOp(WideTy.isVector(), false);
2232 widenScalarSrc(MI, WideTy, 4, BoolExtOp);
2233 widenScalarDst(MI, WideTy, 1);
2239 auto LHSExt = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MI.getOperand(2)});
2240 auto RHSExt = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MI.getOperand(3)});
2246 .buildInstr(Opcode, {WideTy, CarryOutTy},
2250 NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSExt, RHSExt}).getReg(0);
2254 auto ExtOp = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {TruncOp});
2265 LLT WideTy) {
2282 unsigned NewBits = WideTy.getScalarSizeInBits();
2287 auto LHS = MIRBuilder.buildAnyExt(WideTy, MI.getOperand(1));
2288 auto RHS = IsShift ? MIRBuilder.buildZExt(WideTy, MI.getOperand(2))
2289 : MIRBuilder.buildAnyExt(WideTy, MI.getOperand(2));
2290 auto ShiftK = MIRBuilder.buildConstant(WideTy, SHLAmount);
2291 auto ShiftL = MIRBuilder.buildShl(WideTy, LHS, ShiftK);
2292 auto ShiftR = IsShift ? RHS : MIRBuilder.buildShl(WideTy, RHS, ShiftK);
2294 auto WideInst = MIRBuilder.buildInstr(MI.getOpcode(), {WideTy},
2299 auto Result = IsSigned ? MIRBuilder.buildAShr(WideTy, WideInst, ShiftK)
2300 : MIRBuilder.buildLShr(WideTy, WideInst, ShiftK);
2309 LLT WideTy) {
2312 widenScalarDst(MI, WideTy, 1);
2328 auto LeftOperand = MIRBuilder.buildInstr(ExtOp, {WideTy}, {LHS});
2329 auto RightOperand = MIRBuilder.buildInstr(ExtOp, {WideTy}, {RHS});
2331 // Multiplication cannot overflow if the WideTy is >= 2 * original width,
2333 bool WideMulCanOverflow = WideTy.getScalarSizeInBits() < 2 * SrcBitWidth;
2340 Mulo = MIRBuilder.buildInstr(MulOpc, {WideTy, OverflowTy},
2343 Mulo = MIRBuilder.buildInstr(MulOpc, {WideTy}, {LeftOperand, RightOperand});
2355 ExtResult = MIRBuilder.buildSExtInReg(WideTy, Mul, SrcBitWidth);
2359 ExtResult = MIRBuilder.buildZExtInReg(WideTy, Mul, SrcBitWidth);
2375 LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) {
2391 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT);
2392 widenScalarDst(MI, WideTy, 0);
2398 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT);
2399 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_ANYEXT);
2400 widenScalarDst(MI, WideTy, 0);
2406 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_ANYEXT);
2407 widenScalarSrc(MI, WideTy, 4, TargetOpcode::G_ANYEXT);
2408 widenScalarDst(MI, WideTy, 0);
2415 widenScalarDst(MI, WideTy, 1);
2419 return widenScalarExtract(MI, TypeIdx, WideTy);
2421 return widenScalarInsert(MI, TypeIdx, WideTy);
2423 return widenScalarMergeValues(MI, TypeIdx, WideTy);
2425 return widenScalarUnmergeValues(MI, TypeIdx, WideTy);
2434 return widenScalarAddSubOverflow(MI, TypeIdx, WideTy);
2437 return widenScalarMulo(MI, TypeIdx, WideTy);
2444 return widenScalarAddSubShlSat(MI, TypeIdx, WideTy);
2452 widenScalarDst(MI, WideTy, 0);
2464 auto MIBSrc = MIRBuilder.buildInstr(ExtOpc, {WideTy}, {SrcReg});
2472 APInt::getOneBitSet(WideTy.getSizeInBits(), CurTy.getSizeInBits());
2474 WideTy, MIBSrc, MIRBuilder.buildConstant(WideTy, TopBit));
2479 unsigned SizeDiff = WideTy.getSizeInBits() - CurTy.getSizeInBits();
2484 // MIBSrc = MIBSrc << (sizeinbits(WideTy) - sizeinbits(CurTy))
2486 MIBSrc = MIRBuilder.buildShl(WideTy, MIBSrc,
2487 MIRBuilder.buildConstant(WideTy, SizeDiff));
2491 auto MIBNewOp = MIRBuilder.buildInstr(NewOpc, {WideTy}, {MIBSrc});
2496 WideTy, MIBNewOp, MIRBuilder.buildConstant(WideTy, SizeDiff));
2507 Register ShrReg = MRI.createGenericVirtualRegister(WideTy);
2508 Register DstExt = MRI.createGenericVirtualRegister(WideTy);
2509 Register ShiftAmtReg = MRI.createGenericVirtualRegister(WideTy);
2510 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2517 unsigned DiffBits = WideTy.getScalarSizeInBits() - Ty.getScalarSizeInBits();
2530 unsigned DiffBits = WideTy.getScalarSizeInBits() - Ty.getScalarSizeInBits();
2532 Register DstExt = MRI.createGenericVirtualRegister(WideTy);
2533 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2537 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, DiffBits);
2538 auto Shift = MIRBuilder.buildLShr(WideTy, DstExt, ShiftAmt);
2546 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2547 widenScalarDst(MI, WideTy);
2553 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_SEXT);
2554 widenScalarDst(MI, WideTy);
2569 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2570 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT);
2571 widenScalarDst(MI, WideTy);
2580 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2581 widenScalarDst(MI, WideTy);
2583 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
2584 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_ZEXT);
2594 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2595 widenScalarDst(MI, WideTy);
2600 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
2612 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
2621 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_SEXT);
2622 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT);
2623 widenScalarDst(MI, WideTy);
2629 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT);
2630 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_SEXT);
2631 widenScalarDst(MI, WideTy);
2632 widenScalarDst(MI, WideTy, 1);
2644 widenScalarSrc(MI, WideTy, 1, CvtOp);
2645 widenScalarDst(MI, WideTy);
2650 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
2660 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT);
2661 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
2662 widenScalarDst(MI, WideTy);
2668 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
2669 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_ZEXT);
2670 widenScalarDst(MI, WideTy);
2671 widenScalarDst(MI, WideTy, 1);
2681 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT);
2682 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_ANYEXT);
2683 widenScalarDst(MI, WideTy);
2687 widenScalarSrc(MI, WideTy, 1, MIRBuilder.getBoolExtOp(IsVec, false));
2700 widenScalarDst(MI, WideTy);
2702 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_FPEXT);
2710 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
2712 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_SEXT);
2720 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
2722 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT);
2730 widenScalarDst(MI, WideTy);
2746 widenScalarSrc(MI, WideTy, 0, ExtType);
2761 ? SrcVal.sext(WideTy.getSizeInBits())
2762 : SrcVal.zext(WideTy.getSizeInBits());
2766 widenScalarDst(MI, WideTy);
2777 widenScalarDst(*IntCst, WideTy, 0, TargetOpcode::G_TRUNC);
2783 widenScalarDst(MI, WideTy);
2789 widenScalarSrc(MI, WideTy, 0, MIRBuilder.getBoolExtOp(false, false));
2796 widenScalarDst(MI, WideTy);
2798 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_FPEXT);
2799 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_FPEXT);
2807 widenScalarDst(MI, WideTy);
2813 widenScalarSrc(MI, WideTy, 2, ExtOpcode);
2814 widenScalarSrc(MI, WideTy, 3, ExtOpcode);
2822 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT);
2833 widenScalarSrc(MI, WideTy, I, TargetOpcode::G_ANYEXT);
2838 widenScalarDst(MI, WideTy);
2849 MI, LLT::vector(VecTy.getElementCount(), WideTy.getSizeInBits()), 1,
2852 widenScalarDst(MI, WideTy, 0);
2861 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT);
2868 const LLT WideEltTy = WideTy.getElementType();
2870 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
2872 widenScalarDst(MI, WideTy, 0);
2882 LLT WideVecTy = LLT::vector(VecTy.getElementCount(), WideTy);
2885 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ANYEXT);
2894 widenScalarSrc(MI, WideTy, 3, TargetOpcode::G_SEXT);
2945 widenScalarSrc(MI, WideTy, I, TargetOpcode::G_FPEXT);
2947 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
2958 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_FPEXT);
2959 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
2968 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_SEXT);
2979 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_FPEXT);
2980 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
2982 widenScalarDst(MI, WideTy, 1);
2993 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ZEXT);
3001 widenScalarDst(MI, WideTy, 0);
3007 const LLT WideEltTy = TypeIdx == 1 ? WideTy : WideTy.getElementType();
3016 widenScalarDst(MI, WideTy, 0);
3027 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
3028 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_TRUNC);
3035 widenScalarSrc(MI, WideTy, 2, TargetOpcode::G_ZEXT);
3051 ? LLT::vector(VecTy.getElementCount(), WideTy)
3052 : WideTy;
3054 widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC);
3063 const APInt Val = SrcVal.sext(WideTy.getSizeInBits());
3066 widenScalarDst(MI, WideTy);
3075 widenScalarSrc(MI, WideTy, 1, TargetOpcode::G_ANYEXT);
3630 LLT WideTy = LLT::scalar(StoreSizeInBits);
3634 SrcReg = MIRBuilder.buildAnyExt(WideTy, SrcReg).getReg(0);
3635 SrcTy = WideTy;
3641 MF.getMachineMemOperand(&MMO, MMO.getPointerInfo(), WideTy);
7454 LLT WideTy = LLT::scalar(DstTy.getSizeInBits());
7455 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src0Reg).getReg(0);
7461 auto ZextInput = MIRBuilder.buildZExt(WideTy, SrcReg);
7463 Register NextResult = I + 1 == NumOps && WideTy == DstTy ? DstReg :
7464 MRI.createGenericVirtualRegister(WideTy);
7466 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset);
7467 auto Shl = MIRBuilder.buildShl(WideTy, ZextInput, ShiftAmt);
8279 LLT WideTy = OrigTy.changeElementSize(SizeInBits * 2);
8281 auto LHS = MIRBuilder.buildInstr(ExtOp, {WideTy}, {MI.getOperand(1)});
8282 auto RHS = MIRBuilder.buildInstr(ExtOp, {WideTy}, {MI.getOperand(2)});
8283 auto Mul = MIRBuilder.buildMul(WideTy, LHS, RHS);
8286 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, SizeInBits);
8287 auto Shifted = MIRBuilder.buildInstr(ShiftOp, {WideTy}, {Mul, ShiftAmt});