Lines Matching defs:SrcTy
238 LLT SrcTy = MRI.getType(SrcReg);
239 if (SrcTy == GCDTy) {
252 LLT SrcTy = MRI.getType(SrcReg);
253 LLT GCDTy = getGCDType(getGCDType(SrcTy, NarrowTy), DstTy);
1403 LLT SrcTy = MRI.getType(SrcReg);
1404 if (SrcTy.isVector())
1409 unsigned LeftoverBits = SrcTy.getSizeInBits() - HandledSize;
1410 if (SrcTy.isVector() && LeftoverBits != 0)
1413 if (8 * StoreMI.getMemSize().getValue() != SrcTy.getSizeInBits()) {
1526 LLT SrcTy = MRI.getType(LHS);
1527 uint64_t SrcSize = SrcTy.getSizeInBits();
1537 if (!extractParts(LHS, SrcTy, NarrowTy, LeftoverTy, LHSPartRegs,
1543 if (!extractParts(MI.getOperand(3).getReg(), SrcTy, NarrowTy, Unused,
1854 LLT SrcTy = MRI.getType(Src1Reg);
1856 const int SrcSize = SrcTy.getSizeInBits();
1973 LLT SrcTy = MRI.getType(SrcReg);
1974 if (SrcTy.isVector())
1982 if (WideTy.getSizeInBits() >= SrcTy.getSizeInBits()) {
1983 if (SrcTy.isPointer()) {
1985 if (DL.isNonIntegralAddressSpace(SrcTy.getAddressSpace())) {
1991 SrcTy = LLT::scalar(SrcTy.getSizeInBits());
1992 SrcReg = MIRBuilder.buildPtrToInt(SrcTy, SrcReg).getReg(0);
1995 // Widen SrcTy to WideTy. This does not affect the result, but since the
1996 // user requested this size, it is probably better handled than SrcTy and
1998 if (WideTy.getSizeInBits() > SrcTy.getSizeInBits()) {
1999 SrcTy = WideTy;
2009 auto ShiftAmt = MIRBuilder.buildConstant(SrcTy, DstSize * I);
2010 auto Shr = MIRBuilder.buildLShr(SrcTy, SrcReg, ShiftAmt);
2019 LLT LCMTy = getLCMType(SrcTy, WideTy);
2022 if (LCMTy.getSizeInBits() != SrcTy.getSizeInBits()) {
2024 if (SrcTy.isPointer()) {
2097 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
2101 if (SrcTy.isVector() || DstTy.isVector())
2105 if (SrcTy.isPointer()) {
2109 if (DL.isNonIntegralAddressSpace(SrcTy.getAddressSpace()))
2112 LLT SrcAsIntTy = LLT::scalar(SrcTy.getSizeInBits());
2114 SrcTy = SrcAsIntTy;
2129 LLT ShiftTy = SrcTy;
2130 if (WideTy.getSizeInBits() > SrcTy.getSizeInBits()) {
2142 if (SrcTy.isScalar()) {
2149 if (!SrcTy.isVector())
2152 if (DstTy != SrcTy.getElementType())
2155 if (Offset % SrcTy.getScalarSizeInBits() != 0)
2161 MI.getOperand(2).setImm((WideTy.getSizeInBits() / SrcTy.getSizeInBits()) *
2319 LLT SrcTy = MRI.getType(LHS);
2321 unsigned SrcBitWidth = SrcTy.getScalarSizeInBits();
3135 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
3136 if (SrcTy.isVector()) {
3137 LLT SrcEltTy = SrcTy.getElementType();
3142 int NumSrcElt = SrcTy.getNumElements();
3444 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
3445 LLT SrcScalTy = LLT::scalar(SrcTy.getSizeInBits());
3615 LLT SrcTy = MRI.getType(SrcReg);
3624 if (SrcTy.isVector())
3632 if (StoreSizeInBits > SrcTy.getSizeInBits()) {
3635 SrcTy = WideTy;
3638 auto ZextInReg = MIRBuilder.buildZExtInReg(SrcTy, SrcReg, StoreWidth);
3649 if (MemTy != SrcTy)
3654 return reduceLoadStoreWidth(StoreMI, 0, SrcTy.getElementType());
3677 if (SrcTy.isPointer()) {
3678 const LLT IntPtrTy = LLT::scalar(SrcTy.getSizeInBits());
4409 LLT SrcTy = MRI.getType(SrcReg);
4418 assert(SrcTy.isVector() && NarrowTy.isVector() && "Expected vector types");
4419 assert((SrcTy.getScalarType() == NarrowTy.getScalarType()) && "bad type");
4421 if ((SrcTy.getSizeInBits() % NarrowTy.getSizeInBits() != 0) ||
4425 // This is most likely DstTy (smaller then register size) packed in SrcTy
4427 // lowered to bit sequence extracts from register. Unpack SrcTy to NarrowTy
4430 // %1:_(DstTy), %2, %3, %4 = G_UNMERGE_VALUES %0:_(SrcTy)
4432 // %5:_(NarrowTy), %6 = G_UNMERGE_VALUES %0:_(SrcTy) - reg sequence
4454 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
4460 if (NarrowTy == SrcTy)
4468 assert(SrcTy.isVector() && "Expected vector types");
4469 assert((SrcTy.getScalarType() == NarrowTy.getScalarType()) && "bad type");
4471 (NarrowTy.getNumElements() >= SrcTy.getNumElements()))
4473 // %2:_(DstTy) = G_CONCAT_VECTORS %0:_(SrcTy), %1:_(SrcTy)
4475 // %3:_(EltTy), %4, %5 = G_UNMERGE_VALUES %0:_(SrcTy)
4476 // %6:_(EltTy), %7, %8 = G_UNMERGE_VALUES %1:_(SrcTy)
4506 if ((NarrowTy.getSizeInBits() % SrcTy.getSizeInBits() != 0) ||
4510 // This is most likely SrcTy (smaller then register size) packed in DstTy
4512 // lowered to bit sequence packing into register. Merge SrcTy to NarrowTy
4515 // %0:_(DstTy) = G_MERGE_VALUES %1:_(SrcTy), %2, %3, %4
4517 // %5:_(NarrowTy) = G_MERGE_VALUES %1:_(SrcTy), %2 - sequence of bits in reg
4518 // %6:_(NarrowTy) = G_MERGE_VALUES %3:_(SrcTy), %4
4522 unsigned NumSrcElts = SrcTy.isVector() ? SrcTy.getNumElements() : 1;
4883 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
4885 unsigned SrcScalSize = SrcTy.getScalarSizeInBits();
5052 auto [DstReg, DstTy, SrcReg, SrcTy] = RdxMI.getFirst2RegLLTs();
5055 (SrcTy.getNumElements() % NarrowTy.getNumElements() != 0))
5062 NarrowTy.isVector() ? SrcTy.getNumElements() / NarrowTy.getNumElements()
5063 : SrcTy.getNumElements();
5109 if (isPowerOf2_32(SrcTy.getNumElements()) &&
5111 return tryNarrowPow2Reduction(MI, SrcReg, SrcTy, NarrowTy, ScalarOpc);
5133 auto [DstReg, DstTy, ScalarReg, ScalarTy, SrcReg, SrcTy] =
5147 unsigned NumParts = SrcTy.getNumElements();
5161 LLT SrcTy, LLT NarrowTy,
5166 SrcTy.getNumElements() / NarrowTy.getNumElements(), SplitSrcs,
5641 LLT SrcTy = MRI.getType(MI.getOperand(1).getReg());
5644 unsigned coefficient = SrcTy.getNumElements() * MoreTy.getNumElements();
5650 LLT NewTy = SrcTy.changeElementCount(
5696 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
5699 unsigned SrcNumElts = SrcTy.getNumElements();
5712 moreElementsVectorDst(MI, SrcTy, 0);
5728 auto Undef = MIRBuilder.buildUndef(SrcTy);
6007 LLT SrcTy = MRI.getType(Src);
6012 if (SrcTy.getScalarType() != LLT::scalar(16) ||
6289 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6292 if (SrcTy.isScalar() && SrcTy.getSizeInBits() == 2 * NarrowSize) {
6322 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6325 if (SrcTy.isScalar() && SrcTy.getSizeInBits() == 2 * NarrowSize) {
6355 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6358 if (SrcTy.isScalar() && SrcTy.getSizeInBits() == 2 * NarrowSize) {
6416 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6417 unsigned Len = SrcTy.getSizeInBits();
6419 if (isSupported({TargetOpcode::G_CTLZ_ZERO_UNDEF, {DstTy, SrcTy}})) {
6422 auto ZeroSrc = MIRBuilder.buildConstant(SrcTy, 0);
6424 CmpInst::ICMP_EQ, SrcTy.changeElementSize(1), SrcReg, ZeroSrc);
6444 auto MIBShiftAmt = MIRBuilder.buildConstant(SrcTy, 1ULL << i);
6446 SrcTy, Op, MIRBuilder.buildLShr(SrcTy, Op, MIBShiftAmt));
6463 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6465 unsigned Len = SrcTy.getSizeInBits();
6466 if (isSupported({TargetOpcode::G_CTTZ_ZERO_UNDEF, {DstTy, SrcTy}})) {
6470 auto Zero = MIRBuilder.buildConstant(SrcTy, 0);
6482 auto MIBCstNeg1 = MIRBuilder.buildConstant(SrcTy, -1);
6483 auto MIBNot = MIRBuilder.buildXor(SrcTy, SrcReg, MIBCstNeg1);
6485 SrcTy, MIBNot, MIRBuilder.buildAdd(SrcTy, SrcReg, MIBCstNeg1));
6486 if (!isSupported({TargetOpcode::G_CTPOP, {SrcTy, SrcTy}}) &&
6487 isSupported({TargetOpcode::G_CTLZ, {SrcTy, SrcTy}})) {
6488 auto MIBCstLen = MIRBuilder.buildConstant(SrcTy, Len);
6490 MIRBuilder.buildCTLZ(SrcTy, MIBTmp));
6704 LLT SrcTy = MRI.getType(Src);
6708 uint32_t SrcTyScalarSize = SrcTy.getScalarSizeInBits();
6717 LLT MidTy = SrcTy.changeElementSize(SrcTyScalarSize * 2);
6759 LLT SrcTy = MRI.getType(SrcReg);
6763 isPowerOf2_32(SrcTy.getNumElements()) &&
6764 isPowerOf2_32(SrcTy.getScalarSizeInBits())) {
6766 LLT SplitSrcTy = SrcTy.changeElementCount(
6767 SrcTy.getElementCount().divideCoefficientBy(2));
6775 if (DstTy.getScalarSizeInBits() * 2 < SrcTy.getScalarSizeInBits())
6788 if (DstTy.getScalarSizeInBits() * 2 < SrcTy.getScalarSizeInBits())
6802 auto [Dst, DstTy, Src, SrcTy, Amt, AmtTy] = MI.getFirst3RegLLTs();
6813 auto [Dst, DstTy, Src, SrcTy, Amt, AmtTy] = MI.getFirst3RegLLTs();
6822 if (LI.isLegalOrCustom({RevRot, {DstTy, SrcTy}}) &&
6938 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
6940 if (SrcTy == LLT::scalar(1)) {
6948 if (SrcTy != LLT::scalar(64))
6963 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
6969 if (SrcTy == S1) {
6977 if (SrcTy != S64)
7006 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
7010 if (SrcTy != S64 && SrcTy != S32)
7020 APFloat TwoPExpFP(SrcTy.getSizeInBits() == 32 ? APFloat::IEEEsingle()
7022 APInt::getZero(SrcTy.getSizeInBits()));
7027 MachineInstrBuilder Threshold = MIRBuilder.buildFConstant(SrcTy, TwoPExpFP);
7030 MachineInstrBuilder FSub = MIRBuilder.buildFSub(SrcTy, Src, Threshold);
7046 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
7051 if (SrcTy.getScalarType() != S32 || DstTy.getScalarType() != S64)
7058 unsigned SrcEltBits = SrcTy.getScalarSizeInBits();
7060 auto ExponentMask = MIRBuilder.buildConstant(SrcTy, 0x7F800000);
7061 auto ExponentLoBit = MIRBuilder.buildConstant(SrcTy, 23);
7063 auto AndExpMask = MIRBuilder.buildAnd(SrcTy, Src, ExponentMask);
7064 auto ExponentBits = MIRBuilder.buildLShr(SrcTy, AndExpMask, ExponentLoBit);
7066 auto SignMask = MIRBuilder.buildConstant(SrcTy,
7068 auto AndSignMask = MIRBuilder.buildAnd(SrcTy, Src, SignMask);
7069 auto SignLowBit = MIRBuilder.buildConstant(SrcTy, SrcEltBits - 1);
7070 auto Sign = MIRBuilder.buildAShr(SrcTy, AndSignMask, SignLowBit);
7073 auto MantissaMask = MIRBuilder.buildConstant(SrcTy, 0x007FFFFF);
7074 auto AndMantissaMask = MIRBuilder.buildAnd(SrcTy, Src, MantissaMask);
7075 auto K = MIRBuilder.buildConstant(SrcTy, 0x00800000);
7077 auto R = MIRBuilder.buildOr(SrcTy, AndMantissaMask, K);
7080 auto Bias = MIRBuilder.buildConstant(SrcTy, 127);
7081 auto Exponent = MIRBuilder.buildSub(SrcTy, ExponentBits, Bias);
7082 auto SubExponent = MIRBuilder.buildSub(SrcTy, Exponent, ExponentLoBit);
7083 auto ExponentSub = MIRBuilder.buildSub(SrcTy, ExponentLoBit, Exponent);
7097 auto ZeroSrcTy = MIRBuilder.buildConstant(SrcTy, 0);
7227 auto [DstTy, SrcTy] = MI.getFirst2LLTs();
7231 if (DstTy.getScalarType() == S16 && SrcTy.getScalarType() == S64)
7794 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
7798 if (SrcTy.isVector()) {
7799 unsigned SrcEltSize = SrcTy.getElementType().getSizeInBits();
7803 (Offset + DstSize <= SrcTy.getSizeInBits())) {
7805 auto Unmerge = MIRBuilder.buildUnmerge(SrcTy.getElementType(), SrcReg);
7824 (SrcTy.isScalar() ||
7825 (SrcTy.isVector() && DstTy == SrcTy.getElementType()))) {
7826 LLT SrcIntTy = SrcTy;
7827 if (!SrcTy.isScalar()) {
7828 SrcIntTy = LLT::scalar(SrcTy.getSizeInBits());
8296 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
8313 unsigned BitSize = SrcTy.getScalarSizeInBits();
8314 const fltSemantics &Semantics = getFltSemanticForLLT(SrcTy.getScalarType());
8317 if (SrcTy.isVector())
8318 IntTy = LLT::vector(SrcTy.getElementCount(), IntTy);
8590 LLT SrcTy = MRI.getType(SrcReg);
8594 if (SrcTy.isScalar()) {
8595 if (DstTy.getSizeInBits() > SrcTy.getSizeInBits())
9000 LLT SrcTy = MRI.getType(Src);
9001 Offset = MIB.buildConstant(LLT::scalar(SrcTy.getSizeInBits()), CurrOffset)
9003 LoadPtr = MIB.buildPtrAdd(SrcTy, Src, Offset).getReg(0);
9098 LLT SrcTy = MRI.getType(Src);
9100 MIB.buildConstant(LLT::scalar(SrcTy.getSizeInBits()), CurrOffset);
9101 LoadPtr = MIB.buildPtrAdd(SrcTy, Src, Offset).getReg(0);