Lines Matching defs:HalfTy

5191                                              const LLT HalfTy, const LLT AmtTy) {
5193   Register InL = MRI.createGenericVirtualRegister(HalfTy);
5194   Register InH = MRI.createGenericVirtualRegister(HalfTy);
5203   LLT NVT = HalfTy;
5204   unsigned NVTBits = HalfTy.getSizeInBits();
5303   const LLT HalfTy = LLT::scalar(NewBitSize);
5307     return narrowScalarShiftByConstant(MI, VRegAndVal->Value, HalfTy,
5316   Register InL = MRI.createGenericVirtualRegister(HalfTy);
5317   Register InH = MRI.createGenericVirtualRegister(HalfTy);
5331     auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt);
5333     auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, AmtLack);
5334     auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt);
5335     auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
5338     auto LoL = MIRBuilder.buildConstant(HalfTy, 0);         // Lo part is zero.
5339     auto HiL = MIRBuilder.buildShl(HalfTy, InL, AmtExcess); // Hi from Lo part.
5341     auto Lo = MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL);
5343         HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL));
5352     auto HiS = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy}, {InH, Amt});
5354     auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt);
5355     auto HiOr = MIRBuilder.buildShl(HalfTy, InH, AmtLack);
5356     auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
5361       HiL = MIRBuilder.buildConstant(HalfTy, 0);            // Hi part is zero.
5364       HiL = MIRBuilder.buildAShr(HalfTy, InH, ShiftAmt);    // Sign of Hi part.
5366     auto LoL = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy},
5370         HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL));
5372     auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL);