Lines Matching defs:DstTy
250 LLT LegalizerHelper::extractGCDType(SmallVectorImpl<Register> &Parts, LLT DstTy,
253 LLT GCDTy = getGCDType(getGCDType(SrcTy, NarrowTy), DstTy);
258 LLT LegalizerHelper::buildLCMMergePieces(LLT DstTy, LLT NarrowTy, LLT GCDTy,
261 LLT LCMTy = getLCMType(DstTy, NarrowTy);
351 LLT DstTy = MRI.getType(DstReg);
356 if (DstTy == LCMTy) {
362 if (DstTy.isScalar() && LCMTy.isScalar()) {
368 unsigned NumDefs = LCMTy.getSizeInBits() / DstTy.getSizeInBits();
372 UnmergeDefs[I] = MRI.createGenericVirtualRegister(DstTy);
1231 LLT DstTy = MRI.getType(DstReg);
1241 if (DstTy.isVector())
1242 ImplicitTy = LLT::vector(DstTy.getElementCount(), ImplicitTy);
1257 if (DstTy.isVector())
1358 LLT DstTy = MRI.getType(DstReg);
1359 if (DstTy.isVector())
1362 if (8 * LoadMI.getMemSize().getValue() != DstTy.getSizeInBits()) {
1850 auto [DstReg, DstTy, Src1Reg, Src1Ty] = MI.getFirst2RegLLTs();
1851 if (DstTy.isVector())
1855 const int DstSize = DstTy.getSizeInBits();
1862 unsigned PartSize = DstTy.getSizeInBits() / NumSrc;
1876 Register NextResult = I + 1 == NumOps && WideTy == DstTy ? DstReg :
1887 else if (DstTy.isPointer())
1954 if (DstTy.getSizeInBits() == WideDstTy.getSizeInBits()) {
1978 LLT DstTy = MRI.getType(Dst0Reg);
1979 if (!DstTy.isScalar())
2005 unsigned DstSize = DstTy.getSizeInBits();
2049 const LLT GCDTy = getGCDType(WideTy, DstTy);
2051 const int PartsPerRemerge = DstTy.getSizeInBits() / GCDTy.getSizeInBits();
2056 const int PartsPerUnmerge = WideTy.getSizeInBits() / DstTy.getSizeInBits();
2067 MIB.addDef(MRI.createGenericVirtualRegister(DstTy));
2097 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
2101 if (SrcTy.isVector() || DstTy.isVector())
2117 if (DstTy.isPointer())
2152 if (DstTy != SrcTy.getElementType())
3135 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
3140 if (DstTy.isVector()) {
3141 int NumDstElt = DstTy.getNumElements();
3144 LLT DstEltTy = DstTy.getElementType();
3186 if (DstTy.isVector()) {
3188 getUnmergePieces(SrcRegs, MIRBuilder, Src, DstTy.getElementType());
3231 auto [Dst, DstTy, SrcVec, SrcVecTy, Idx, IdxTy] = MI.getFirst3RegLLTs();
3367 auto [Dst, DstTy, SrcVec, SrcVecTy, Val, ValTy, Idx, IdxTy] =
3369 LLT VecTy = DstTy;
3444 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
3473 LLT DstTy = MRI.getType(DstReg);
3492 LLT LoadTy = DstTy;
3496 if (MemStoreSizeInBits > DstTy.getSizeInBits()) {
3513 if (DstTy != LoadTy)
3559 if (MemTy != DstTy)
3564 return reduceLoadStoreWidth(LoadMI, 0, DstTy.getElementType());
3573 unsigned AnyExtSize = PowerOf2Ceil(DstTy.getSizeInBits());
3588 if (AnyExtTy == DstTy)
3590 else if (AnyExtTy.getSizeInBits() != DstTy.getSizeInBits()) {
3594 assert(DstTy.isPointer() && "expected pointer");
4026 LLT DstTy = MRI.getType(DstReg);
4027 Register TmpRes = MRI.createGenericVirtualRegister(DstTy);
4029 auto MIBSz = MIRBuilder.buildConstant(DstTy, DstTy.getScalarSizeInBits() - SizeInBits);
4408 LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
4411 if (TypeIdx != 1 || NarrowTy == DstTy)
4422 (NarrowTy.getSizeInBits() % DstTy.getSizeInBits() != 0))
4425 // This is most likely DstTy (smaller then register size) packed in SrcTy
4428 // (register size) pieces first. Then unpack each of NarrowTy pieces to DstTy.
4430 // %1:_(DstTy), %2, %3, %4 = G_UNMERGE_VALUES %0:_(SrcTy)
4433 // %1:_(DstTy), %2 = G_UNMERGE_VALUES %5:_(NarrowTy) - sequence of bits in reg
4434 // %3:_(DstTy), %4 = G_UNMERGE_VALUES %6:_(NarrowTy)
4454 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
4458 assert(DstTy.isVector() && NarrowTy.isVector() && "Expected vector types");
4459 assert((DstTy.getScalarType() == NarrowTy.getScalarType()) && "bad type");
4470 if ((DstTy.getSizeInBits() % NarrowTy.getSizeInBits() != 0) ||
4473 // %2:_(DstTy) = G_CONCAT_VECTORS %0:_(SrcTy), %1:_(SrcTy)
4480 // %2:_(DstTy) = G_CONCAT_VECTORS %9:_(NarrowTy), %10, %11
4492 unsigned NumNarrowTyPieces = DstTy.getNumElements() / NumNarrowTyElts;
4507 (DstTy.getSizeInBits() % NarrowTy.getSizeInBits() != 0))
4510 // This is most likely SrcTy (smaller then register size) packed in DstTy
4513 // (register size) pieces first. Then merge each of NarrowTy pieces to DstTy.
4515 // %0:_(DstTy) = G_MERGE_VALUES %1:_(SrcTy), %2, %3, %4
4519 // %0:_(DstTy) = G_MERGE_VALUES %5:_(NarrowTy), %6 - reg sequence
4521 unsigned NumParts = DstTy.getNumElements() / NarrowTy.getNumElements();
4883 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
4891 if (extractGCDType(SrcVRegs, DstTy, SrcNarrowTy, SrcReg) != SrcNarrowTy)
4911 auto [DstReg, DstTy, Src1Reg, Src1Ty, Src2Reg, Src2Ty] =
4915 if (DstTy != Src1Ty)
4917 if (DstTy != Src2Ty)
4920 if (!isPowerOf2_32(DstTy.getNumElements()))
4926 DstTy.changeElementCount(DstTy.getElementCount().divideCoefficientBy(2));
5052 auto [DstReg, DstTy, SrcReg, SrcTy] = RdxMI.getFirst2RegLLTs();
5067 if (DstTy != NarrowTy)
5103 MIRBuilder.buildInstr(RdxMI.getOpcode(), {DstTy}, {SplitSrcs[Part]})
5121 .buildInstr(ScalarOpc, {DstTy}, {Acc, PartialReductions[Part]})
5133 auto [DstReg, DstTy, ScalarReg, ScalarTy, SrcReg, SrcTy] =
5135 if (!NarrowTy.isScalar() || TypeIdx != 2 || DstTy != ScalarTy ||
5136 DstTy != NarrowTy)
5289 LLT DstTy = MRI.getType(DstReg);
5290 if (DstTy.isVector())
5295 const unsigned DstEltSize = DstTy.getScalarSizeInBits();
5547 auto [DstReg, DstTy, CondReg, CondTy] = MI.getFirst2RegLLTs();
5550 DstTy.getElementCount() != MoreTy.getElementCount())
5642 LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
5645 if (coefficient % DstTy.getNumElements() != 0)
5648 coefficient = coefficient / DstTy.getNumElements();
5696 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
5700 LLT DestEltTy = DstTy.getElementType();
5769 auto [DstTy, Src1Ty, Src2Ty] = MI.getFirst3LLTs();
5771 unsigned NumElts = DstTy.getNumElements();
5774 if (DstTy.isVector() && Src1Ty.isVector() &&
5775 DstTy.getNumElements() != Src1Ty.getNumElements()) {
5783 if (DstTy != Src1Ty || DstTy != Src2Ty)
6179 LLT DstTy = MRI.getType(DstReg);
6187 if (!extractParts(MI.getOperand(1).getReg(), DstTy, NarrowTy, LeftoverTy,
6192 if (!extractParts(MI.getOperand(2).getReg(), DstTy, NarrowTy, Unused,
6209 insertParts(DstReg, DstTy, NarrowTy, DstRegs,
6224 LLT DstTy = MRI.getType(DstReg);
6225 if (DstTy.isVector())
6229 LLT GCDTy = extractGCDType(Parts, DstTy, NarrowTy, SrcReg);
6230 LLT LCMTy = buildLCMMergePieces(DstTy, NarrowTy, GCDTy, Parts, MI.getOpcode());
6249 LLT DstTy = MRI.getType(DstReg);
6255 if (!extractParts(MI.getOperand(2).getReg(), DstTy, NarrowTy, LeftoverTy,
6260 if (!extractParts(MI.getOperand(3).getReg(), DstTy, NarrowTy, Unused,
6276 insertParts(DstReg, DstTy, NarrowTy, DstRegs,
6289 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6302 B.buildCTLZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(0)) :
6303 B.buildCTLZ(DstTy, UnmergeSrc.getReg(0));
6304 auto C_NarrowSize = B.buildConstant(DstTy, NarrowSize);
6305 auto HiIsZeroCTLZ = B.buildAdd(DstTy, LoCTLZ, C_NarrowSize);
6306 auto HiCTLZ = B.buildCTLZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(1));
6322 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6335 B.buildCTTZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(1)) :
6336 B.buildCTTZ(DstTy, UnmergeSrc.getReg(1));
6337 auto C_NarrowSize = B.buildConstant(DstTy, NarrowSize);
6338 auto LoIsZeroCTTZ = B.buildAdd(DstTy, HiCTTZ, C_NarrowSize);
6339 auto LoCTTZ = B.buildCTTZ_ZERO_UNDEF(DstTy, UnmergeSrc.getReg(0));
6355 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6361 auto LoCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(0));
6362 auto HiCTPOP = MIRBuilder.buildCTPOP(DstTy, UnmergeSrc.getReg(1));
6416 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6419 if (isSupported({TargetOpcode::G_CTLZ_ZERO_UNDEF, {DstTy, SrcTy}})) {
6421 auto CtlzZU = MIRBuilder.buildCTLZ_ZERO_UNDEF(DstTy, SrcReg);
6425 auto LenConst = MIRBuilder.buildConstant(DstTy, Len);
6449 auto MIBPop = MIRBuilder.buildCTPOP(DstTy, Op);
6450 MIRBuilder.buildSub(MI.getOperand(0), MIRBuilder.buildConstant(DstTy, Len),
6463 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
6466 if (isSupported({TargetOpcode::G_CTTZ_ZERO_UNDEF, {DstTy, SrcTy}})) {
6469 auto CttzZU = MIRBuilder.buildCTTZ_ZERO_UNDEF(DstTy, SrcReg);
6472 CmpInst::ICMP_EQ, DstTy.changeElementSize(1), SrcReg, Zero);
6473 auto LenConst = MIRBuilder.buildConstant(DstTy, Len);
6703 LLT DstTy = MRI.getType(Dst);
6706 uint32_t DstTySize = DstTy.getSizeInBits();
6707 uint32_t DstTyScalarSize = DstTy.getScalarSizeInBits();
6727 LLT ZExtResTy = DstTy.changeElementCount(
6728 DstTy.getElementCount().divideCoefficientBy(2));
6758 LLT DstTy = MRI.getType(DstReg);
6761 if (DstTy.isVector() && isPowerOf2_32(DstTy.getNumElements()) &&
6762 isPowerOf2_32(DstTy.getScalarSizeInBits()) &&
6775 if (DstTy.getScalarSizeInBits() * 2 < SrcTy.getScalarSizeInBits())
6776 InterTy = SplitSrcTy.changeElementSize(DstTy.getScalarSizeInBits() * 2);
6778 InterTy = SplitSrcTy.changeElementSize(DstTy.getScalarSizeInBits());
6785 DstTy.changeElementSize(InterTy.getScalarSizeInBits()), SplitSrcs);
6788 if (DstTy.getScalarSizeInBits() * 2 < SrcTy.getScalarSizeInBits())
6802 auto [Dst, DstTy, Src, SrcTy, Amt, AmtTy] = MI.getFirst3RegLLTs();
6813 auto [Dst, DstTy, Src, SrcTy, Amt, AmtTy] = MI.getFirst3RegLLTs();
6815 unsigned EltSizeInBits = DstTy.getScalarSizeInBits();
6822 if (LI.isLegalOrCustom({RevRot, {DstTy, SrcTy}}) &&
6830 if ((IsFShLegal = LI.isLegalOrCustom({FShOpc, {DstTy, AmtTy}})) ||
6831 LI.isLegalOrCustom({RevFsh, {DstTy, AmtTy}})) {
6842 Amt = MIRBuilder.buildNeg(DstTy, Amt).getReg(0);
6858 ShVal = MIRBuilder.buildInstr(ShOpc, {DstTy}, {Src, ShAmt}).getReg(0);
6861 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Src, RevAmt}).getReg(0);
6867 ShVal = MIRBuilder.buildInstr(ShOpc, {DstTy}, {Src, ShAmt}).getReg(0);
6870 auto Inner = MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Src, One});
6872 MIRBuilder.buildInstr(RevShiftOpc, {DstTy}, {Inner, RevAmt}).getReg(0);
6938 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
6941 auto True = MIRBuilder.buildFConstant(DstTy, 1.0);
6942 auto False = MIRBuilder.buildFConstant(DstTy, 0.0);
6951 if (DstTy == LLT::scalar(32)) {
6963 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
6970 auto True = MIRBuilder.buildFConstant(DstTy, -1.0);
6971 auto False = MIRBuilder.buildFConstant(DstTy, 0.0);
6980 if (DstTy == S32) {
7006 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
7012 if (DstTy != S32 && DstTy != S64)
7019 APInt TwoPExpInt = APInt::getSignMask(DstTy.getSizeInBits());
7025 MachineInstrBuilder FPTOSI = MIRBuilder.buildFPTOSI(DstTy, Src);
7031 MachineInstrBuilder ResLowBits = MIRBuilder.buildFPTOSI(DstTy, FSub);
7032 MachineInstrBuilder ResHighBit = MIRBuilder.buildConstant(DstTy, TwoPExpInt);
7033 MachineInstrBuilder Res = MIRBuilder.buildXor(DstTy, ResLowBits, ResHighBit);
7046 auto [Dst, DstTy, Src, SrcTy] = MI.getFirst2RegLLTs();
7051 if (SrcTy.getScalarType() != S32 || DstTy.getScalarType() != S64)
7071 Sign = MIRBuilder.buildSExt(DstTy, Sign);
7078 R = MIRBuilder.buildZExt(DstTy, R);
7085 auto Shl = MIRBuilder.buildShl(DstTy, R, SubExponent);
7086 auto Srl = MIRBuilder.buildLShr(DstTy, R, ExponentSub);
7092 R = MIRBuilder.buildSelect(DstTy, CmpGt, Shl, Srl);
7094 auto XorSign = MIRBuilder.buildXor(DstTy, R, Sign);
7095 auto Ret = MIRBuilder.buildSub(DstTy, XorSign, Sign);
7102 auto ZeroDstTy = MIRBuilder.buildConstant(DstTy, 0);
7227 auto [DstTy, SrcTy] = MI.getFirst2LLTs();
7231 if (DstTy.getScalarType() == S16 && SrcTy.getScalarType() == S64)
7280 LLT DstTy = MRI.getType(Dst);
7281 LLT CmpTy = DstTy.changeElementSize(1);
7290 auto One = MIRBuilder.buildConstant(DstTy, 1);
7291 auto Zero = MIRBuilder.buildConstant(DstTy, 0);
7294 auto SelectZeroOrOne = MIRBuilder.buildSelect(DstTy, IsGT, One, Zero);
7296 auto MinusOne = MIRBuilder.buildConstant(DstTy, -1);
7307 auto [Dst, DstTy, Src0, Src0Ty, Src1, Src1Ty] = MI.getFirst3RegLLTs();
7451 auto [DstReg, DstTy, Src0Reg, Src0Ty] = MI.getFirst2RegLLTs();
7454 LLT WideTy = LLT::scalar(DstTy.getSizeInBits());
7463 Register NextResult = I + 1 == NumOps && WideTy == DstTy ? DstReg :
7472 if (DstTy.isPointer()) {
7474 DstTy.getAddressSpace())) {
7491 LLT DstTy = MRI.getType(Dst0Reg);
7492 if (DstTy.isPointer())
7504 const unsigned DstSize = DstTy.getSizeInBits();
7600 auto [DstReg, DstTy, Src0Reg, Src0Ty, Src1Reg, Src1Ty] =
7607 LLT EltTy = DstTy.getScalarType();
7629 if (DstTy.isScalar())
7639 auto [Dst, DstTy, Vec, VecTy, Mask, MaskTy, Passthru, PassthruTy] =
7794 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
7800 unsigned DstSize = DstTy.getSizeInBits();
7823 if (DstTy.isScalar() &&
7825 (SrcTy.isVector() && DstTy == SrcTy.getElementType()))) {
7851 LLT DstTy = MRI.getType(Src);
7855 if (DstTy.isVector() && !InsertTy.isPointer()) {
7856 LLT EltTy = DstTy.getElementType();
7861 (Offset + InsertSize <= DstTy.getSizeInBits())) {
7883 for (; Idx < DstTy.getNumElements(); ++Idx) {
7894 (DstTy.isVector() && DstTy.getElementType() != InsertTy))
7898 if ((DstTy.isPointer() &&
7899 DL.isNonIntegralAddressSpace(DstTy.getAddressSpace())) ||
7906 LLT IntDstTy = DstTy;
7908 if (!DstTy.isScalar()) {
7909 IntDstTy = LLT::scalar(DstTy.getSizeInBits());
7925 DstTy.getSizeInBits(), Offset + InsertTy.getSizeInBits(), Offset);
8296 auto [DstReg, DstTy, SrcReg, SrcTy] = MI.getFirst2RegLLTs();
8329 APInt InvertionMask = APInt::getAllOnes(DstTy.getScalarSizeInBits());
8339 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_NE, DstTy, AsInt, Abs);
8341 auto Res = MIRBuilder.buildConstant(DstTy, 0);
8343 LLT DstTyCopy = DstTy;
8351 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, Abs,
8356 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, AsInt,
8361 auto Cmp = MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, Abs,
8363 auto And = MIRBuilder.buildAnd(DstTy, Cmp, Sign);
8374 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy,
8383 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy,
8387 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy, Abs, ZeroC));
8389 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy,
8400 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, VMinusOne,
8403 SubnormalRes = MIRBuilder.buildAnd(DstTy, SubnormalRes, Sign);
8409 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy,
8413 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy, Abs, InfC));
8417 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, DstTy,
8427 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGT, DstTy, Abs, InfC));
8430 appendToRes(MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGE, DstTy, Abs,
8436 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_UGT, DstTy, Abs, InfC);
8437 auto IsNotQnan = MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy,
8439 appendToRes(MIRBuilder.buildAnd(DstTy, IsNan, IsNotQnan));
8451 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_ULT, DstTy, ExpMinusOne,
8454 NormalRes = MIRBuilder.buildAnd(DstTy, NormalRes, Sign);
8457 DstTy, Sign, MIRBuilder.buildConstant(DstTy, InvertionMask));
8458 NormalRes = MIRBuilder.buildAnd(DstTy, NormalRes, PosSign);
8470 auto [DstReg, DstTy, MaskReg, MaskTy, Op1Reg, Op1Ty, Op2Reg, Op2Ty] =
8473 bool IsEltPtr = DstTy.isPointerOrPointerVector();
8475 LLT ScalarPtrTy = LLT::scalar(DstTy.getScalarSizeInBits());
8476 LLT NewTy = DstTy.changeElementType(ScalarPtrTy);
8479 DstTy = NewTy;
8494 MIRBuilder.buildSExtOrTrunc(DstTy.getScalarType(), MaskElt).getReg(0);
8496 if (DstTy.isVector()) {
8498 auto ShufSplat = MIRBuilder.buildShuffleSplat(DstTy, MaskElt);
8503 MaskTy = DstTy;
8504 } else if (!DstTy.isVector()) {
8509 if (MaskTy.getSizeInBits() != DstTy.getSizeInBits()) {
8517 auto Or = MIRBuilder.buildOr(DstTy, NewOp1, NewOp2);
8548 LLT DstTy = MRI.getType(MI.getOperand(0).getReg());
8551 MIRBuilder.buildConstant(DstTy, DstTy.getScalarSizeInBits() - 1);
8552 auto Shift = MIRBuilder.buildAShr(DstTy, OpReg, ShiftAmt);
8553 auto Add = MIRBuilder.buildAdd(DstTy, OpReg, Shift);
8591 LLT DstTy = MRI.getType(SrcReg);
8595 if (DstTy.getSizeInBits() > SrcTy.getSizeInBits())
9010 LLT DstTy = MRI.getType(Dst);
9011 StorePtr = MIB.buildPtrAdd(DstTy, Dst, Offset).getReg(0);
9116 LLT DstTy = MRI.getType(Dst);
9118 MIB.buildConstant(LLT::scalar(DstTy.getSizeInBits()), CurrOffset);
9119 StorePtr = MIB.buildPtrAdd(DstTy, Dst, Offset).getReg(0);