Lines Matching defs:CondTy

3929     const LLT CondTy = MRI.getType(CarryOut);
3938     auto Carry = MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CondTy, TmpRes, LHS);
3948         MIRBuilder.buildICmp(CmpInst::ICMP_EQ, CondTy, NewRes, Zero);
3949     auto Carry2 = MIRBuilder.buildAnd(CondTy, ResEqZero, CarryIn);
3968     const LLT CondTy = MRI.getType(BorrowOut);
3975     auto Borrow = MIRBuilder.buildICmp(CmpInst::ICMP_UGT, CondTy, TmpRes, LHS);
3985         MIRBuilder.buildICmp(CmpInst::ICMP_EQ, CondTy, TmpRes, Zero);
3986     auto Borrow2 = MIRBuilder.buildAnd(CondTy, TmpResEqZero, BorrowIn);
5304   const LLT CondTy = LLT::scalar(1);
5324   auto IsShort = MIRBuilder.buildICmp(ICmpInst::ICMP_ULT, CondTy, Amt, NewBits);
5325   auto IsZero = MIRBuilder.buildICmp(ICmpInst::ICMP_EQ, CondTy, Amt, Zero);
5547     auto [DstReg, DstTy, CondReg, CondTy] = MI.getFirst2RegLLTs();
5549       if (!CondTy.isScalar() ||
5562     if (CondTy.isVector())
5630     LLT CondTy = LLT::fixed_vector(
5633     moreElementsVectorDst(MI, CondTy, 0);
6244   LLT CondTy = MRI.getType(CondReg);
6245   if (CondTy.isVector()) // TODO: Handle vselect
7394   const LLT CondTy = Ty.changeElementSize(1);
7409       MIRBuilder.buildFCmp(CmpInst::FCMP_OGE, CondTy, AbsDiff, Half, Flags);
7427   const LLT CondTy = Ty.changeElementSize(1);
7436   auto Lt0 = MIRBuilder.buildFCmp(CmpInst::FCMP_OLT, CondTy,
7438   auto NeTrunc = MIRBuilder.buildFCmp(CmpInst::FCMP_ONE, CondTy,
7440   auto And = MIRBuilder.buildAnd(CondTy, Lt0, NeTrunc);