Lines Matching defs:OrigRegs
370 /// typed values to the original IR value. \p OrigRegs contains the destination
373 static void buildCopyFromRegs(MachineIRBuilder &B, ArrayRef<Register> OrigRegs,
381 assert(OrigRegs[0] == Regs[0]);
385 if (PartLLT.getSizeInBits() == LLTy.getSizeInBits() && OrigRegs.size() == 1 &&
387 B.buildBitcast(OrigRegs[0], Regs[0]);
397 OrigRegs.size() == 1 && Regs.size() == 1) {
411 LLT OrigTy = MRI.getType(OrigRegs[0]);
414 B.buildIntToPtr(OrigRegs[0], B.buildTrunc(IntPtrTy, SrcReg));
418 B.buildTrunc(OrigRegs[0], SrcReg);
423 assert(OrigRegs.size() == 1);
424 LLT OrigTy = MRI.getType(OrigRegs[0]);
428 B.buildMergeValues(OrigRegs[0], Regs);
431 B.buildTrunc(OrigRegs[0], Widened);
438 assert(OrigRegs.size() == 1);
455 mergeVectorRegsToResultRegs(B, OrigRegs, CastRegs);
465 mergeVectorRegsToResultRegs(B, OrigRegs, CastRegs);
477 LLT RealDstEltTy = MRI.getType(OrigRegs[0]).getElementType();
489 B.buildBuildVector(OrigRegs[0], Regs);
509 B.buildBuildVector(OrigRegs[0], EltMerges);
525 LLT OriginalEltTy = MRI.getType(OrigRegs[0]).getElementType();
549 B.buildTrunc(OrigRegs[0], BuildVec);
798 Args[i].OrigRegs.assign(Args[i].Regs.begin(), Args[i].Regs.end());
825 assert(Args[i].OrigRegs.size() == 1);
826 buildCopyToRegs(MIRBuilder, Args[i].Regs, Args[i].OrigRegs[0], OrigTy,
867 MIRBuilder.buildStore(Args[i].OrigRegs[Part], PointerToStackReg,
961 MIRBuilder.buildLoad(Args[i].OrigRegs[0], Args[i].Regs[0], MPO,
978 buildCopyFromRegs(MIRBuilder, Args[i].OrigRegs, Args[i].Regs, OrigTy,