Lines Matching defs:FI

182   // Record reload of Reg from FI in block MBB
183   void recordReload(Register Reg, int FI, const MachineBasicBlock *MBB) {
184     RegSlotPair RSP(Reg, FI);
190   // Does basic block MBB contains reload of Reg from FI?
191   bool hasReload(Register Reg, int FI, const MachineBasicBlock *MBB) {
192     RegSlotPair RSP(Reg, FI);
259         int FI = Idx->second;
260         LLVM_DEBUG(dbgs() << "Found global FI " << FI << " for register "
263         assert(ReservedSlots.count(FI) && "using unreserved slot");
264         return FI;
271       int FI = Line.Slots[Line.Index++];
272       if (ReservedSlots.count(FI))
276       if (MFI.getObjectSize(FI) < Size) {
277         MFI.setObjectSize(FI, Size);
278         MFI.setObjectAlignment(FI, Align(Size));
281       return FI;
283     int FI = MFI.CreateSpillStackObject(Size, Align(Size));
285     Line.Slots.push_back(FI);
288     // Remember assignment {Reg, FI} for EHPad
290       GlobalIndices[EHPad].push_back(std::make_pair(Reg, FI));
291       LLVM_DEBUG(dbgs() << "Reserved FI " << FI << " for spilling reg "
296     return FI;
409       int FI = CacheFI.getFrameIndex(Reg, EHPad);
412       RegToSlotIdx[Reg] = FI;
414       LLVM_DEBUG(dbgs() << "Spilling " << printReg(Reg, &TRI) << " to FI " << FI
424       TII.storeRegToStackSlot(*MI.getParent(), InsertBefore, Reg, IsKill, FI,
432     int FI = RegToSlotIdx[Reg];
434       TII.loadRegFromStackSlot(*MBB, It, Reg, FI, RC, &TRI, Register());
442     TII.loadRegFromStackSlot(*MBB, It, Reg, FI, RC, &TRI, Register());
447     assert(Dummy == FI);
459       LLVM_DEBUG(dbgs() << "Reloading " << printReg(Reg, &TRI) << " from FI "
520         int FI = RegToSlotIdx[MO.getReg()];
525         MIB.addFrameIndex(FI);