Lines Matching full:resources

14 // 2. Scheduler Read/Write resources for simple per-opcode cost model.
27 // processor resources and latency with each SchedReadWrite type.
32 // be subtarget specific and can be directly associated with resources
38 // subtarget can directly associate resources with SchedReadWrite
85   // Per-cycle resources tables.
136 // Define a number of interchangeable processor resources. NumUnits
139 // An optional Super resource may be given to model these resources as
140 // a subset of the more general super resources. Using one of these
141 // resources implies using one of the super resources.
143 // ProcResourceUnits normally model a few buffered resources within an
144 // out-of-order engine. Buffered resources may be held for multiple
164 // Use BufferSize = 0 for resources that force "dispatch/issue
200 class ProcResGroup<list<ProcResource> resources> : ProcResourceKind {
201   list<ProcResource> Resources = resources;
233 // be mapped the resources composed from a set of previously defined
249 // SchedModel ties these resources to a processor.
250 class ProcWriteResources<list<ProcResourceKind> resources> {
251   list<ProcResourceKind> ProcResources = resources;
277 // Define the resources and latency of a SchedWrite. This will be used
281 // resources.
285 // them to processor resources in one place. Then ItinRW can map
288 // ProcResources indicates the set of resources consumed by the write.
292 // can be `[]`: in that case, all resources are consumed for a single
296 // unbuffered resources.
310 class WriteRes<SchedWrite write, list<ProcResourceKind> resources>
311   : ProcWriteResources<resources> {
318 class SchedWriteRes<list<ProcResourceKind> resources> : SchedWrite,
319   ProcWriteResources<resources>;
323 // SchedModel ties these resources to a processor.
445 // Map a set of itinerary classes to SchedReadWrite resources. This is
575 // Base class for Load/StoreQueue.  It is used to identify processor resources