Lines Matching +full:cpu +full:- +full:map

1 //===-- DecodedThread.h -----------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 #include "intel-pt.h"
82   /// the same non-interpolated timestamps in nanoseconds.
107     ///   The tsc -> nanos conversion utility
123     /// A count for each individual event kind. We use an unordered map instead
142     // libipt error -> count
173   /// Get the most recent CPU id before or at the given trace item index.
179   ///   The requested cpu id, or \a LLDB_INVALID_CPU_ID if not available.
238   /// Notify this object that a CPU has been seen.
239   /// If this a new CPU, an event will be created.
283   /// This map contains the TSCs of the decoded trace items. It maps
284   /// `item index -> TSC`, where `item index` is the first index
287   std::map<uint64_t, TSCRange> m_tscs;
289   std::optional<std::map<uint64_t, TSCRange>::iterator> m_last_tsc =
291   /// This map contains the non-interpolated nanoseconds timestamps of the
292   /// decoded trace items. It maps `item index -> nanoseconds`, where `item
296   std::map<uint64_t, NanosecondsRange> m_nanoseconds;
297   std::optional<std::map<uint64_t, NanosecondsRange>::iterator>
300   // The cpu information is stored as a map. It maps `item index -> CPU`.
301   // A CPU is associated with the next instructions that follow until the next
302   // cpu is seen.
303   std::map<uint64_t, lldb::cpu_id_t> m_cpus;
304   /// This is the chronologically last CPU ID.
307   // The PSB offsets are stored as a map. It maps `item index -> psb offset`.
310   /// TSC -> nanos conversion utility.