Lines Matching full:ra

141        "std RS, DS(RA)"},  in GetOpcodeForInstruction()
143 "stdu RS, DS(RA)"}, in GetOpcodeForInstruction()
145 "or RA, RS, RB"}, in GetOpcodeForInstruction()
147 "addi RT, RA, SI"}, in GetOpcodeForInstruction()
149 "ld RT, DS(RA)"}}; in GetOpcodeForInstruction()
230 uint32_t ra = Bits32(opcode, 20, 16); in EmulateLD() local
237 if (ra != gpr_r1_ppc64le || rt != gpr_r1_ppc64le || ids != 0) in EmulateLD()
241 LLDB_LOG(log, "EmulateLD: {0:X+8}: ld r{1}, {2}(r{3})", m_addr, rt, ids, ra); in EmulateLD()
260 uint32_t ra = Bits32(opcode, 20, 16); in EmulateSTD() local
265 if (ra != gpr_r1_ppc64le) in EmulateSTD()
280 u ? "u" : "", rs, ids, ra); in EmulateSTD()
298 std::optional<RegisterInfo> ra_info = GetRegisterInfo(eRegisterKindLLDB, ra); in EmulateSTD()
307 uint64_t ra_val = ReadRegisterUnsigned(eRegisterKindLLDB, ra, 0, &success); in EmulateSTD()
314 // update RA? in EmulateSTD()
317 // NOTE Currently, RA will always be equal to SP(r1) in EmulateSTD()
319 WriteRegisterUnsigned(ctx, eRegisterKindLLDB, ra, addr); in EmulateSTD()
328 uint32_t ra = Bits32(opcode, 20, 16); in EmulateOR() local
333 (ra != gpr_r30_ppc64le && ra != gpr_r31_ppc64le) || rb != gpr_r1_ppc64le) in EmulateOR()
337 LLDB_LOG(log, "EmulateOR: {0:X+8}: mr r{1}, r{2}", m_addr, ra, rb); in EmulateOR()
340 std::optional<RegisterInfo> ra_info = GetRegisterInfo(eRegisterKindLLDB, ra); in EmulateOR()
353 WriteRegisterUnsigned(ctx, eRegisterKindLLDB, ra, rb_val); in EmulateOR()
354 m_fp = ra; in EmulateOR()
361 uint32_t ra = Bits32(opcode, 20, 16); in EmulateADDI() local
365 // (this is a typical epilogue operation, with ra == r1. If it's in EmulateADDI()
366 // something else, then we won't know the correct value of ra) in EmulateADDI()
367 if (rt != gpr_r1_ppc64le || ra != gpr_r1_ppc64le) in EmulateADDI()