Lines Matching defs:setflags
1151 ALUWritePC(result); // setflags is always FALSE here
1154 if setflags then
1212 ALUWritePC(result); // setflags is always FALSE here
1215 if setflags then
1274 ALUWritePC(result); // setflags is always FALSE here
1277 if setflags then
1290 bool setflags;
1295 setflags = false;
1302 setflags = true;
1309 setflags = BitIsSet(opcode, 20);
1310 // if setflags && (BadReg(d) || BadReg(m)) then UNPREDICTABLE;
1311 if (setflags && (BadReg(Rd) || BadReg(Rm)))
1313 // if !setflags && (d == 15 || m == 15 || (d == 13 && m == 13)) then
1315 if (!setflags && (Rd == 15 || Rm == 15 || (Rd == 13 && Rm == 13)))
1321 setflags = BitIsSet(opcode, 20);
1325 if (Rd == 15 && setflags)
1347 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags))
1365 ALUWritePC(result); // setflags is always FALSE here
1368 if setflags then
1381 // for setflags == false, this value is a don't care initialized to
1383 bool setflags;
1387 setflags = !InITBlock();
1395 setflags = BitIsSet(opcode, 20);
1403 // d = UInt(Rd); setflags = FALSE; imm32 = ZeroExtend(imm4:i:imm3:imm8,
1406 setflags = false;
1419 // d = UInt(Rd); setflags = (S == '1'); (imm32, carry) =
1422 setflags = BitIsSet(opcode, 20);
1427 if ((Rd == 15) && setflags)
1433 // d = UInt(Rd); setflags = FALSE; imm32 = ZeroExtend(imm4:imm12, 32);
1435 setflags = false;
1455 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
1478 if setflags then
1491 bool setflags;
1496 // d = UInt(Rdm); n = UInt(Rn); m = UInt(Rdm); setflags = !InITBlock();
1500 setflags = !InITBlock();
1509 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = FALSE;
1513 setflags = false;
1522 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == '1');
1526 setflags = BitIsSet(opcode, 20);
1575 // if setflags then
1576 if (setflags) {
1607 ALUWritePC(result); // setflags is always FALSE here
1610 if setflags then
1622 bool setflags;
1626 setflags = BitIsSet(opcode, 20);
1631 setflags = BitIsSet(opcode, 20);
1636 if (Rd == 15 && setflags)
1649 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
1668 ALUWritePC(result); // setflags is always FALSE here
1671 if setflags then
1684 bool setflags;
1690 setflags = !InITBlock();
1699 setflags = BitIsSet(opcode, 20);
1708 setflags = BitIsSet(opcode, 20);
1730 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
1836 ALUWritePC(result); // setflags is always FALSE here
1839 if setflags then
1855 bool setflags;
1858 // d = UInt(Rd); setflags = FALSE; imm32 = ZeroExtend(imm8:'00', 32);
1861 setflags = false;
1865 // d = 13; setflags = FALSE; imm32 = ZeroExtend(imm7:'00', 32);
1868 setflags = false;
1872 // d = UInt(Rd); setflags = (S == "1"); imm32 =
1876 setflags = Bit32(opcode, 20);
1879 if (d == 15 && setflags == 1)
1883 if (d == 15 && setflags == 0)
1889 // d = UInt(Rd); setflags = FALSE; imm32 = ZeroExtend(i:imm3:imm8, 32);
1891 setflags = false;
1923 // if setflags then
1928 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags,
1948 ALUWritePC(result); // setflags is always FALSE here
1951 if setflags then
2277 ALUWritePC(result); // setflags is always FALSE here
2280 if setflags then
2327 ALUWritePC(result); // setflags is always FALSE here
2330 if setflags then
2380 ALUWritePC(result); // setflags is always FALSE here
2383 if setflags then
2398 bool setflags;
2403 setflags = false;
2408 setflags = BitIsSet(opcode, 20);
2410 if (Rd == 15 && setflags)
2412 if (Rd == 15 && !setflags)
2417 setflags = false;
2424 setflags = BitIsSet(opcode, 20);
2429 if (Rd == 15 && setflags)
2449 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
3017 if setflags then
3029 bool setflags;
3036 // d = UInt(Rd); n = UInt(Rn); setflags = !InITBlock(); imm32 =
3040 setflags = !InITBlock();
3046 // d = UInt(Rdn); n = UInt(Rdn); setflags = !InITBlock(); imm32 =
3050 setflags = !InITBlock();
3057 // d = UInt(Rd); n = UInt(Rn); setflags = (S == '1'); imm32 =
3061 setflags = BitIsSet(opcode, 20);
3076 // d = UInt(Rd); n = UInt(Rn); setflags = FALSE; imm32 =
3080 setflags = false;
3116 // if setflags then
3121 if (!WriteCoreRegOptionalFlags(context, res.result, d, setflags,
3139 ALUWritePC(result); // setflags is always FALSE here
3142 if setflags then
3155 bool setflags;
3160 setflags = BitIsSet(opcode, 20);
3186 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
3205 ALUWritePC(result); // setflags is always FALSE here
3208 if setflags then
3221 bool setflags;
3227 setflags = !InITBlock();
3234 setflags = false;
3246 setflags = BitIsSet(opcode, 20);
3276 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
3534 ALUWritePC(result); // setflags is always FALSE here
3537 if setflags then
3561 if setflags then
3582 ALUWritePC(result); // setflags is always FALSE here
3585 if setflags then
3608 if setflags then
3630 ALUWritePC(result); // setflags is always FALSE here
3633 if setflags then
3656 if setflags then
3678 ALUWritePC(result); // setflags is always FALSE here
3681 if setflags then
3705 if setflags then
3728 ALUWritePC(result); // setflags is always FALSE here
3731 if setflags then
3757 bool setflags;
3773 setflags = !InITBlock();
3784 setflags = BitIsSet(opcode, 20);
3792 setflags = BitIsSet(opcode, 20);
3821 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
3843 bool setflags;
3849 setflags = !InITBlock();
3855 setflags = BitIsSet(opcode, 20);
3863 setflags = BitIsSet(opcode, 20);
3892 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
5788 ALUWritePC(result); // setflags is always FALSE here
5791 if setflags then
5804 bool setflags;
5809 setflags = BitIsSet(opcode, 20);
5817 setflags = BitIsSet(opcode, 20);
5820 if (Rd == 15 && setflags)
5838 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
5858 ALUWritePC(result); // setflags is always FALSE here
5861 if setflags then
5874 bool setflags;
5879 setflags = !InITBlock();
5887 setflags = BitIsSet(opcode, 20);
5896 setflags = BitIsSet(opcode, 20);
5899 if (Rd == 15 && setflags)
5925 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
6005 ALUWritePC(result); // setflags is always FALSE here
6008 if setflags then
6021 bool setflags;
6027 setflags = BitIsSet(opcode, 20);
6032 if (Rd == 15 && setflags)
6034 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn))
6040 setflags = BitIsSet(opcode, 20);
6045 if (Rd == 15 && setflags)
6063 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
6081 ALUWritePC(result); // setflags is always FALSE here
6084 if setflags then
6097 bool setflags;
6103 setflags = !InITBlock();
6111 setflags = BitIsSet(opcode, 20);
6114 if (Rd == 15 && setflags)
6116 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm))
6123 setflags = BitIsSet(opcode, 20);
6126 if (Rd == 15 && setflags)
6152 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
6170 ALUWritePC(result); // setflags is always FALSE here
6173 if setflags then
6186 bool setflags;
6192 setflags = BitIsSet(opcode, 20);
6202 setflags = BitIsSet(opcode, 20);
6209 if (Rd == 15 && setflags)
6227 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
6246 ALUWritePC(result); // setflags is always FALSE here
6249 if setflags then
6262 bool setflags;
6268 setflags = !InITBlock();
6276 setflags = BitIsSet(opcode, 20);
6285 setflags = BitIsSet(opcode, 20);
6290 if (Rd == 15 && setflags)
6316 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
8809 ALUWritePC(result); // setflags is always FALSE here
8812 if setflags then
8825 bool setflags;
8831 setflags = BitIsSet(opcode, 20);
8836 if (Rd == 15 && setflags)
8838 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn))
8844 setflags = BitIsSet(opcode, 20);
8851 if (Rd == 15 && setflags)
8869 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
8888 ALUWritePC(result); // setflags is always FALSE here
8891 if setflags then
8904 bool setflags;
8910 setflags = !InITBlock();
8918 setflags = BitIsSet(opcode, 20);
8921 if (Rd == 15 && setflags)
8923 if (Rd == 13 || (Rd == 15 && !setflags) || BadReg(Rn) || BadReg(Rm))
8930 setflags = BitIsSet(opcode, 20);
8935 if (Rd == 15 && setflags)
8961 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
8978 ALUWritePC(result); // setflags is always FALSE here
8981 if setflags then
8994 bool setflags;
9000 setflags = BitIsSet(opcode, 20);
9013 setflags = BitIsSet(opcode, 20);
9018 if (Rd == 15 && setflags)
9036 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
9055 ALUWritePC(result); // setflags is always FALSE here
9058 if setflags then
9071 bool setflags;
9077 setflags = !InITBlock();
9085 setflags = BitIsSet(opcode, 20);
9097 setflags = BitIsSet(opcode, 20);
9100 if (Rd == 15 && setflags)
9126 if (!WriteCoreRegOptionalFlags(context, result, Rd, setflags, carry))
9143 ALUWritePC(result); // setflags is always FALSE here
9146 if setflags then
9157 bool setflags;
9164 setflags = !InITBlock();
9170 setflags = BitIsSet(opcode, 20);
9178 setflags = BitIsSet(opcode, 20);
9183 if (Rd == 15 && setflags)
9200 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9216 ALUWritePC(result); // setflags is always FALSE here
9219 if setflags then
9231 bool setflags;
9239 setflags = BitIsSet(opcode, 20);
9249 setflags = BitIsSet(opcode, 20);
9254 if (Rd == 15 && setflags)
9278 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9294 ALUWritePC(result); // setflags is always FALSE here
9297 if setflags then
9308 bool setflags;
9315 setflags = BitIsSet(opcode, 20);
9320 if (Rd == 15 && setflags)
9337 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9354 ALUWritePC(result); // setflags is always FALSE here
9357 if setflags then
9369 bool setflags;
9377 setflags = BitIsSet(opcode, 20);
9382 if (Rd == 15 && setflags)
9406 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9423 ALUWritePC(result); // setflags is always FALSE here
9426 if setflags then
9437 bool setflags;
9444 setflags = BitIsSet(opcode, 20);
9452 setflags = BitIsSet(opcode, 20);
9457 if (Rd == 15 && setflags)
9474 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9492 ALUWritePC(result); // setflags is always FALSE here
9495 if setflags then
9507 bool setflags;
9514 setflags = !InITBlock();
9522 setflags = BitIsSet(opcode, 20);
9531 setflags = BitIsSet(opcode, 20);
9536 if (Rd == 15 && setflags)
9560 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9575 if setflags then
9586 bool setflags;
9593 setflags = !InITBlock();
9598 setflags = !InITBlock();
9604 setflags = BitIsSet(opcode, 20);
9608 if (Rd == 15 && setflags)
9616 if (Rd == 13 || (Rd == 15 && !setflags) || Rn == 15)
9622 setflags = BitIsSet(opcode, 20);
9650 return WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9665 ALUWritePC(result); // setflags is always FALSE here
9668 if setflags then
9680 bool setflags;
9687 setflags = BitIsSet(opcode, 20);
9691 if (Rn == 15 && !setflags)
9700 if (Rd == 15 && setflags)
9724 if (!WriteCoreRegOptionalFlags(context, res.result, Rd, setflags,
9996 ALUWritePC(result); // setflags is always FALSE here
9999 if setflags then
10011 bool setflags;
10017 // d = UInt(Rd); m = UInt(Rm); setflags = (S == '1');
10020 setflags = BitIsSet(opcode, 20);
10036 // d = UInt(Rd); m = UInt(Rm); setflags = (S == '1');
10039 setflags = BitIsSet(opcode, 20);
10043 if (d == 15 && setflags)
10078 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags,
10095 if setflags then
10109 bool setflags;
10120 // setflags = (S == '1'); shift_t = DecodeRegShift(type);
10121 setflags = BitIsSet(opcode, 20);
10170 // if setflags then
10175 if (setflags)
10190 ALUWritePC(result); // setflags is always FALSE here
10193 if setflags then
10206 bool setflags;
10212 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = !InITBlock();
10216 setflags = !InITBlock();
10225 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S =="1");
10229 setflags = BitIsSet(opcode, 20);
10232 if (d == 15 && setflags == 1)
10252 // d = UInt(Rd); n = UInt(Rn); m = UInt(Rm); setflags = (S == '1');
10256 setflags = BitIsSet(opcode, 20);
10260 if ((d == 15) && setflags)
10289 // // setflags is always FALSE here else
10291 // if setflags then
10305 if (!WriteCoreRegOptionalFlags(context, res.result, dwarf_r0 + d, setflags,
14204 // ALUWritePC(result); // setflags is always FALSE here
14207 // if setflags then
14216 Context &context, const uint32_t result, const uint32_t Rd, bool setflags,
14239 if (setflags)