Lines Matching defs:imm12
1177 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
1420 // ARMExpandImm_C(imm12, APSR.C);
1433 // d = UInt(Rd); setflags = FALSE; imm32 = ZeroExtend(imm4:imm12, 32);
1437 uint32_t imm12 = Bits32(opcode, 11, 0);
1438 imm32 = (imm4 << 12) | imm12;
1788 imm32 = Bits32(opcode, 11, 0) << 2; // imm32 = ZeroExtend(imm12, 32);
2296 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
2346 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
2425 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
2478 uint32_t imm12;
2488 imm12 = Bits32(opcode, 11, 0);
2506 offset_addr = sp + imm12;
2508 offset_addr = sp - imm12;
3161 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
3311 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
3428 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
4462 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
5170 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
5509 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
5818 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
5970 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
6043 carry); // (imm32, carry) = ARMExpandImm(imm12, APSR.C)
6205 carry); // (imm32, carry) = ARMExpandImm(imm12, APSR.C)
6359 // if Rn == '1101' && P == '0' && U == '1' && W == '0' && imm12 ==
6361 // t == UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
6705 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
6833 // t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1');
6849 // t == UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1');
7101 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
7230 // t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1');
7511 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
7655 // t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1');
7912 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
8066 // t = UInt(Rt); imm32 = ZeroExtend(imm12, 32); add = (U == '1');
8847 carry); // (imm32, carry) = ARMExpandImm(imm12, APSR.C)
9016 carry); // (imm32, carry) = ARMExpandImm(imm12, APSR.C)
9179 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
9316 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
9453 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
9688 imm32 = ARMExpandImm(opcode); // imm32 = ARMExpandImm(imm12)
9767 carry); // (imm32, carry) = ARMExpandImm(imm12, APSR.C)
9892 carry); // (imm32, carry) = ARMExpandImm(imm12, APSR.C)
10451 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
10546 // if Rn == '1101' && P == '1' && U == '0' && W == '1' && imm12 ==
10548 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm12, 32);
12679 // n = UInt(Rn); imm32 = ARMExpandImm(imm12); register_form = FALSE;
12842 // if Rn == '1101' && imm12 == '000000000100' then SEE PUSH;
12844 &EmulateInstructionARM::EmulateSTRRtSP, "str Rt, [sp, #-imm12]!"},
13060 "ldr<c> <Rt> [<Rn> {#+/-<imm12>}]"},
13133 "strb<c> <Rt>,[<Rn>,#+/-<imm12>]!"},
13136 "str<c> <Rt>,[<Rn>,#+/-<imm12>]!"},
13219 &EmulateInstructionARM::EmulateSUBSPImm, "subw sp, sp, #imm12"},
13391 "addw<c> <Rd>,<Rn>,#<imm12>"},
13403 "subw<c> <Rd>, <Rn>, #imm12"},
13408 &EmulateInstructionARM::EmulateSUBSPImm, "subw<c> <Rd>, sp, #imm12"},
13551 "ldr<c>.w <Rt>, [<Rn>{,#imm12}]"},
13569 "ldrb<c>.w <Rt>,[<Rn>{,#<imm12>}]"},
13585 "ldrh<c>.w <Rt>,[<Rn>{,#<imm12>}]"},
13599 "ldrsb<c> <Rt>,[<Rn>,#<imm12>]"},
13613 "ldrsh<c> <Rt>,[<Rn>,#<imm12>]"},
13659 "str<c>.w <Rt>, [<Rn>,#<imm12>]"},
13673 "strb<c>.w <Rt>, [<Rn>, #<imm12>]"},