Lines Matching full:loongarch

1 //===- LoongArch.cpp ------------------------------------------------------===//
25 class LoongArch final : public TargetInfo {
27   LoongArch();
173 LoongArch::LoongArch() {
174   // The LoongArch ISA itself does not have a limit on page sizes. According to
229 uint32_t LoongArch::calcEFlags() const {
279 int64_t LoongArch::getImplicitAddend(const uint8_t *buf, RelType type) const {
309 void LoongArch::writeGotPlt(uint8_t *buf, const Symbol &s) const {
316 void LoongArch::writeIgotPlt(uint8_t *buf, const Symbol &s) const {
325 void LoongArch::writePltHeader(uint8_t *buf) const {
326   // The LoongArch PLT is currently structured just like that of RISCV.
330   // is used everywhere else involving PC-relative operations in the LoongArch
334   // supported by LoongArch assemblers.
359 void LoongArch::writePlt(uint8_t *buf, const Symbol &sym,
376 RelType LoongArch::getDynRel(RelType type) const {
381 RelExpr LoongArch::getRelExpr(const RelType type, const Symbol &s,
429     // The LoongArch add/sub relocs behave like the RISCV counterparts; reuse
528   // [1]: https://web.archive.org/web/20230709064026/https://github.com/loongson/LoongArch-Documentation/issues/51
536 bool LoongArch::usesOnlyLowPageBits(RelType type) const {
550 void LoongArch::relocate(uint8_t *loc, const Relocation &rel,
822 bool LoongArch::relaxOnce(int pass) const {
840 void LoongArch::finalizeRelax(int passes) const {
896   static LoongArch target;