Lines Matching defs:__V
642 /// \param __V
648 _mm_stream_load_si128(const void *__V) {
649 return (__m128i)__builtin_nontemporal_load((const __v2di *)__V);
1090 /// \param __V
1094 __m128i __V) {
1095 return __builtin_ia32_ptestz128((__v2di)__M, (__v2di)__V);
1107 /// \param __V
1111 __m128i __V) {
1112 return __builtin_ia32_ptestc128((__v2di)__M, (__v2di)__V);
1124 /// \param __V
1129 __m128i __V) {
1130 return __builtin_ia32_ptestnzc128((__v2di)__M, (__v2di)__V);
1217 /// \param __V
1221 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi16(__m128i __V) {
1225 __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3, 4, 5, 6,
1239 /// \param __V
1243 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi32(__m128i __V) {
1247 __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1, 2, 3), __v4si);
1259 /// \param __V
1263 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi8_epi64(__m128i __V) {
1267 __builtin_shufflevector((__v16qs)__V, (__v16qs)__V, 0, 1), __v2di);
1279 /// \param __V
1283 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi32(__m128i __V) {
1285 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1, 2, 3), __v4si);
1297 /// \param __V
1301 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi16_epi64(__m128i __V) {
1303 __builtin_shufflevector((__v8hi)__V, (__v8hi)__V, 0, 1), __v2di);
1315 /// \param __V
1319 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepi32_epi64(__m128i __V) {
1321 __builtin_shufflevector((__v4si)__V, (__v4si)__V, 0, 1), __v2di);
1334 /// \param __V
1338 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi16(__m128i __V) {
1340 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3, 4, 5, 6,
1354 /// \param __V
1358 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi32(__m128i __V) {
1360 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1, 2, 3), __v4si);
1372 /// \param __V
1376 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu8_epi64(__m128i __V) {
1378 __builtin_shufflevector((__v16qu)__V, (__v16qu)__V, 0, 1), __v2di);
1390 /// \param __V
1394 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi32(__m128i __V) {
1396 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1, 2, 3), __v4si);
1408 /// \param __V
1412 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu16_epi64(__m128i __V) {
1414 __builtin_shufflevector((__v8hu)__V, (__v8hu)__V, 0, 1), __v2di);
1426 /// \param __V
1430 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_cvtepu32_epi64(__m128i __V) {
1432 __builtin_shufflevector((__v4su)__V, (__v4su)__V, 0, 1), __v2di);
1507 /// \param __V
1510 /// in parameter \a __V, bits [18:16] contain the index of the minimum value
1512 static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_minpos_epu16(__m128i __V) {
1513 return (__m128i)__builtin_ia32_phminposuw128((__v8hi)__V);