Lines Matching +full:least +full:-
1 /*===---- ammintrin.h - SSE4a intrinsics -----------------------------------===
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
22 /// Extracts the specified bits from the lower 64 bits of the 128-bit
39 /// Bits [5:0] specify the index of the least significant bit; the other
43 /// index is non-zero, the result is undefined.
44 /// \returns A 128-bit integer vector whose lower 64 bits contain the bits
50 /// Extracts the specified bits from the lower 64 bits of the 128-bit
61 /// Specifies the index of the least significant bit at [13:8] and the
66 /// is zero but the index is non-zero, the result is undefined.
67 /// \returns A 128-bit vector whose lower 64 bits contain the bits extracted
91 /// least significant bit.
94 /// bits are the least significant bits of operand \a y of length \a len.
99 /// Bits [5:0] specify the index of the least significant bit; the other
103 /// is zero but the index is non-zero, the result is undefined.
104 /// \returns A 128-bit integer vector containing the original lower 64-bits of
123 /// are defined by the length and by the index of the least significant bit
127 /// bits are the least significant bits of operand \a __y with length
134 /// non-zero, the result is undefined.
135 /// \returns A 128-bit integer vector containing the original lower 64-bits of
145 /// Stores a 64-bit double-precision value in a 64-bit memory location.
146 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
154 /// The 64-bit memory location used to store the register value.
156 /// The 64-bit double-precision floating-point register value to be stored.
163 /// Stores a 32-bit single-precision floating-point value in a 32-bit
165 /// non-temporal (unlikely to be used again soon).
172 /// The 32-bit memory location used to store the register value.
174 /// The 32-bit single-precision floating-point register value to be stored.