Lines Matching +full:architecturally +full:- +full:defined
1 /*===---- altivec.h - Standard header for type generic math ---------------===*\
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 \*===----------------------------------------------------------------------===*/
118 return __builtin_altivec_vmaxsb(__a, -__a); in vec_abs()
123 return __builtin_altivec_vmaxsh(__a, -__a); in vec_abs()
128 return __builtin_altivec_vmaxsw(__a, -__a); in vec_abs()
134 return __builtin_altivec_vmaxsd(__a, -__a); in vec_abs()
178 #if defined(__POWER9_VECTOR__)
316 #elif defined(__VSX__)
614 #endif // defined(__POWER8_VECTOR__) && defined(__powerpc64__)
817 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
818 defined(__SIZEOF_INT128__)
875 #endif // defined(__POWER8_VECTOR__) && defined(__powerpc64__)
1776 #elif defined(__VSX__)
1819 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
1902 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
2100 #elif defined(__VSX__)
2170 #elif defined(__VSX__)
2228 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
2298 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
2420 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
2476 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
3020 #if defined(__powerpc64__)
3087 (vector unsigned char)__builtin_altivec_lvsr(16 - __b, (int *)NULL); in vec_xl_len_r()
3165 (vector unsigned char)__builtin_altivec_lvsl(16 - __c, (int *)NULL); in vec_xst_len_r()
3174 #if defined(__POWER9_VECTOR__) && defined(__powerpc64__)
3202 // the XL-compatible signatures are used for those functions.
3213 (vector float)(vector unsigned)((0x7f - \
3219 (vector float)(vector unsigned)((0x7f - \
3233 (vector double)(vector unsigned long long)((0x3ffULL - \
3239 (vector double)(vector unsigned long long)((0x3ffULL - \
3258 (vector double)(vector unsigned long long)((0x3ffULL - \
3263 (vector double)(vector unsigned long long)((0x3ffULL - \
3269 (vector double)(vector unsigned long long)((0x3ffULL - \
3275 (vector double)(vector unsigned long long)((0x3ffULL - \
3482 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
3871 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
6085 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
6319 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
6465 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
7385 /* The various vector pack instructions have a big-endian bias, so for
7954 // The vperm instruction is defined architecturally with a big-endian bias.
8329 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
8336 sizeof(vector unsigned __int128)) - in vec_rl()
8342 return (__b << __a)|(__b >> ((__CHAR_BIT__ * sizeof(vector unsigned __int128)) - __a)); in vec_rl()
8361 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
8394 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
8403 __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, -1, -1, -1, 16, 0, in vec_rlnm()
8404 1, -1, -1, -1, -1, -1); in vec_rlnm()
8406 __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, 31, 30, 15, -1, in vec_rlnm()
8407 -1, -1, -1, -1, -1, -1, -1); in vec_rlnm()
8420 __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, -1, -1, -1, 16, 0, in vec_rlnm()
8421 1, -1, -1, -1, -1, -1); in vec_rlnm()
8423 __builtin_shufflevector(TmpB, TmpC, -1, -1, -1, -1, -1, 31, 30, 15, -1, in vec_rlnm()
8424 -1, -1, -1, -1, -1, -1, -1); in vec_rlnm()
8925 #elif defined(__VSX__)
8932 // Big endian element one (the right doubleword) can be left shifted as-is. in vec_sl()
9024 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9025 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9026 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9027 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9043 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9044 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9045 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9046 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9061 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9062 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9063 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9064 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9079 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9080 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9081 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9082 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9098 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9099 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9100 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9101 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9116 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9117 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9118 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9119 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9135 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9136 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9137 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9138 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9153 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9154 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9155 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9156 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9171 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9172 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9173 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9174 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9190 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9191 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9192 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9193 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9209 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9210 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9211 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9212 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9229 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9230 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9231 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9232 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9248 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9249 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9250 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9251 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9267 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9268 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9269 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9270 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9286 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_sld()
9287 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_sld()
9288 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_sld()
9289 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_sld()
9378 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9379 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9380 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9381 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
9396 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9397 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9398 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9399 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
9415 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9416 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9417 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9418 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
9433 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9434 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9435 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9436 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
9452 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9453 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9454 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9455 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
9471 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9472 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9473 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9474 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
9489 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9490 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9491 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9492 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
9508 __b, __a, (vector unsigned char)(16 - __d, 17 - __d, 18 - __d, 19 - __d, in vec_vsldoi()
9509 20 - __d, 21 - __d, 22 - __d, 23 - __d, in vec_vsldoi()
9510 24 - __d, 25 - __d, 26 - __d, 27 - __d, in vec_vsldoi()
9511 28 - __d, 29 - __d, 30 - __d, 31 - __d)); in vec_vsldoi()
10318 // FIXME: parameter should be treated as 5-bit signed literal
10326 // FIXME: parameter should be treated as 5-bit signed literal
10336 // FIXME: parameter should be treated as 5-bit signed literal
10343 // FIXME: parameter should be treated as 5-bit signed literal
10352 // FIXME: parameter should be treated as 5-bit signed literal
10359 // FIXME: parameter should be treated as 5-bit signed literal
10366 // FIXME: parameter should be treated as 5-bit signed literal
10374 // FIXME: parameter should be treated as 5-bit signed literal
10382 // FIXME: parameter should be treated as 5-bit signed literal
10436 #elif defined(__VSX__)
10441 // Big endian element zero (the left doubleword) can be right shifted as-is. in vec_sr()
10566 #elif defined(__VSX__)
11870 return __a - __b; in vec_sub()
11875 return (vector signed char)__a - __b; in vec_sub()
11880 return __a - (vector signed char)__b; in vec_sub()
11885 return __a - __b; in vec_sub()
11890 return (vector unsigned char)__a - __b; in vec_sub()
11895 return __a - (vector unsigned char)__b; in vec_sub()
11900 return __a - __b; in vec_sub()
11905 return (vector short)__a - __b; in vec_sub()
11910 return __a - (vector short)__b; in vec_sub()
11915 return __a - __b; in vec_sub()
11920 return (vector unsigned short)__a - __b; in vec_sub()
11925 return __a - (vector unsigned short)__b; in vec_sub()
11930 return __a - __b; in vec_sub()
11935 return (vector int)__a - __b; in vec_sub()
11940 return __a - (vector int)__b; in vec_sub()
11945 return __a - __b; in vec_sub()
11950 return (vector unsigned int)__a - __b; in vec_sub()
11955 return __a - (vector unsigned int)__b; in vec_sub()
11958 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
11959 defined(__SIZEOF_INT128__)
11962 return __a - __b; in vec_sub()
11967 return __a - __b; in vec_sub()
11969 #endif // defined(__POWER8_VECTOR__) && defined(__powerpc64__) &&
11970 // defined(__SIZEOF_INT128__)
11975 return __a - __b; in vec_sub()
11980 return __a - __b; in vec_sub()
11985 return __a - __b; in vec_sub()
11991 return __a - __b; in vec_sub()
12000 return __a - __b; in vec_vsububm()
12005 return (vector signed char)__a - __b; in vec_vsububm()
12010 return __a - (vector signed char)__b; in vec_vsububm()
12015 return __a - __b; in vec_vsububm()
12020 return (vector unsigned char)__a - __b; in vec_vsububm()
12025 return __a - (vector unsigned char)__b; in vec_vsububm()
12034 return __a - __b; in vec_vsubuhm()
12039 return (vector short)__a - __b; in vec_vsubuhm()
12044 return __a - (vector short)__b; in vec_vsubuhm()
12049 return __a - __b; in vec_vsubuhm()
12054 return (vector unsigned short)__a - __b; in vec_vsubuhm()
12059 return __a - (vector unsigned short)__b; in vec_vsubuhm()
12068 return __a - __b; in vec_vsubuwm()
12073 return (vector int)__a - __b; in vec_vsubuwm()
12078 return __a - (vector int)__b; in vec_vsubuwm()
12083 return __a - __b; in vec_vsubuwm()
12088 return (vector unsigned int)__a - __b; in vec_vsubuwm()
12093 return __a - (vector unsigned int)__b; in vec_vsubuwm()
12102 return __a - __b; in vec_vsubfp()
12346 return __a - __b; in vec_vsubuqm()
12351 return __a - __b; in vec_vsubuqm()
12525 /* The vsum2sws instruction has a big-endian bias, so that the second
12526 input vector and the result always reference big-endian elements
12527 1 and 3 (little-endian element 0 and 2). For ease of porting the
12565 /* The vsumsws instruction has a big-endian bias, so that the second
12566 input vector and the result always reference big-endian element 3
12567 (little-endian element 0). For ease of porting the programmer
12631 /* The vector unpack instructions all have a big-endian bias, so for
13537 /* ------------------------ extensions for CBEA ----------------------------- */
13646 __builtin_shufflevector(__a, __a, 0, -1, 1, -1, 2, -1, 3, -1); in vec_extract_fp32_from_shorth()
13648 __builtin_shufflevector(__a, __a, -1, 0, -1, 1, -1, 2, -1, 3); in vec_extract_fp32_from_shorth()
13657 __builtin_shufflevector(__a, __a, 4, -1, 5, -1, 6, -1, 7, -1); in vec_extract_fp32_from_shortl()
13659 __builtin_shufflevector(__a, __a, -1, 4, -1, 5, -1, 6, -1, 7); in vec_extract_fp32_from_shortl()
14652 __builtin_shufflevector(__zero, __zero, -1, -1, -1, -1, -1, -1, -1, -1, in vec_promote()
14653 -1, -1, -1, -1, -1, -1, -1, -1); in vec_promote()
14662 __builtin_shufflevector(__zero, __zero, -1, -1, -1, -1, -1, -1, -1, -1, in vec_promote()
14663 -1, -1, -1, -1, -1, -1, -1, -1); in vec_promote()
14671 __builtin_shufflevector(__zero, __zero, -1, -1, -1, -1, -1, -1, -1, -1); in vec_promote()
14680 __builtin_shufflevector(__zero, __zero, -1, -1, -1, -1, -1, -1, -1, -1); in vec_promote()
14687 vector int __res = __builtin_shufflevector(__zero, __zero, -1, -1, -1, -1); in vec_promote()
14696 __builtin_shufflevector(__zero, __zero, -1, -1, -1, -1); in vec_promote()
14703 vector float __res = __builtin_shufflevector(__zero, __zero, -1, -1, -1, -1); in vec_promote()
14711 vector double __res = __builtin_shufflevector(__zero, __zero, -1, -1); in vec_promote()
14720 __builtin_shufflevector(__zero, __zero, -1, -1); in vec_promote()
14729 __builtin_shufflevector(__zero, __zero, -1, -1); in vec_promote()
14775 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
14776 defined(__SIZEOF_INT128__)
14798 /* ----------------------------- predicates --------------------------------- */
14936 // 32-bit elements. in vec_all_eq()
14988 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
15176 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
15356 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
15544 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
15725 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
15941 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
16238 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
16436 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
16626 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
16816 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
17006 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
17221 #if defined(__POWER10_VECTOR__) && defined(__SIZEOF_INT128__)
17339 - Only the SHA and AES instructions and builtins are disabled by -mno-crypto
17340 - The remaining ones are only available on Power8 and up so
17341 require -mpower8-vector
17345 The remaining ones (currently controlled by -mcrypto for GCC) still
17506 #if defined(__powerpc64__) && defined(__SIZEOF_INT128__)
17691 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
17692 defined(__SIZEOF_INT128__)
17788 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
17789 defined(__SIZEOF_INT128__)
17867 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
17868 defined(__SIZEOF_INT128__)
17883 #if defined(__POWER10_VECTOR__) && defined(__VSX__) && \
17884 defined(__SIZEOF_INT128__)
18057 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
18058 defined(__SIZEOF_INT128__)
18076 #if defined(__POWER10_VECTOR__) && defined(__VSX__) && \
18077 defined(__SIZEOF_INT128__)
18206 #if defined(__POWER8_VECTOR__) && defined(__powerpc64__) && \
18207 defined(__SIZEOF_INT128__)
18236 return -__a; in vec_neg()
18241 return -__a; in vec_neg()
18248 return -__a; in vec_neg()
18253 return -__a; in vec_neg()
18257 return -__a; in vec_neg()
18261 return -__a; in vec_neg()
18265 return - vec_abs(__a); in vec_nabs()
18270 return - vec_abs(__a); in vec_nabs()
18277 return __builtin_altivec_vminsd(__a, -__a); in vec_nabs()
18282 return __builtin_altivec_vminsw(__a, -__a); in vec_nabs()
18286 return __builtin_altivec_vminsh(__a, -__a); in vec_nabs()
18290 return __builtin_altivec_vminsb(__a, -__a); in vec_nabs()
19058 __a[1 - __d] = __c; in vec_splati_ins()
19059 __a[3 - __d] = __c; in vec_splati_ins()
19071 __a[1 - __d] = __c; in vec_splati_ins()
19072 __a[3 - __d] = __c; in vec_splati_ins()
19084 __a[1 - __d] = __c; in vec_splati_ins()
19085 __a[3 - __d] = __c; in vec_splati_ins()