Lines Matching defs:IVSigned

2855   const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
2879         RT.emitForNext(*this, S.getBeginLoc(), IVSize, IVSigned, LoopArgs.IL,
2920       [&S, &LoopArgs, LoopExit, &CodeGenLoop, IVSize, IVSigned, &CodeGenOrdered,
2933             [IVSize, IVSigned, Loc, &CodeGenOrdered](CodeGenFunction &CGF) {
2934               CodeGenOrdered(CGF, Loc, IVSize, IVSigned);
3029   const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
3039                            IVSigned, Ordered, DipatchRTInputValues);
3042         IVSize, IVSigned, Ordered, LoopArgs.IL, LoopArgs.LB, LoopArgs.UB,
3050                                     const bool IVSigned) {
3053                                                             IVSigned);
3073                              const unsigned IVSize, const bool IVSigned) {}
3089   const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
3092       IVSize, IVSigned, /* Ordered = */ false, LoopArgs.IL, LoopArgs.LB,
3420       const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
3453             [IVSize, IVSigned, Ordered, IL, LB, UB, ST, StaticChunkedOne, Chunk,
3462                   IVSize, IVSigned, Ordered, IL.getAddress(), LB.getAddress(),
4113         /*IVSize=*/32, /*IVSigned=*/true, /*Ordered=*/false, IL.getAddress(),
5750       const bool IVSigned = IVExpr->getType()->hasSignedIntegerRepresentation();
5767             IVSize, IVSigned, /* Ordered = */ false, IL.getAddress(),