Lines Matching defs:IsSignaling
14404 bool IsSignaling) {
14407 if (IsSignaling)
16263 return getVectorFCmpIR(CmpInst::FCMP_OEQ, /*IsSignaling*/false);
16266 return getVectorFCmpIR(CmpInst::FCMP_OLT, /*IsSignaling*/true);
16269 return getVectorFCmpIR(CmpInst::FCMP_OLE, /*IsSignaling*/true);
16272 return getVectorFCmpIR(CmpInst::FCMP_UNO, /*IsSignaling*/false);
16275 return getVectorFCmpIR(CmpInst::FCMP_UNE, /*IsSignaling*/false);
16278 return getVectorFCmpIR(CmpInst::FCMP_UGE, /*IsSignaling*/true);
16281 return getVectorFCmpIR(CmpInst::FCMP_UGT, /*IsSignaling*/true);
16284 return getVectorFCmpIR(CmpInst::FCMP_ORD, /*IsSignaling*/false);
16313 bool IsSignaling;
16317 case 0x00: Pred = FCmpInst::FCMP_OEQ; IsSignaling = false; break;
16318 case 0x01: Pred = FCmpInst::FCMP_OLT; IsSignaling = true; break;
16319 case 0x02: Pred = FCmpInst::FCMP_OLE; IsSignaling = true; break;
16320 case 0x03: Pred = FCmpInst::FCMP_UNO; IsSignaling = false; break;
16321 case 0x04: Pred = FCmpInst::FCMP_UNE; IsSignaling = false; break;
16322 case 0x05: Pred = FCmpInst::FCMP_UGE; IsSignaling = true; break;
16323 case 0x06: Pred = FCmpInst::FCMP_UGT; IsSignaling = true; break;
16324 case 0x07: Pred = FCmpInst::FCMP_ORD; IsSignaling = false; break;
16325 case 0x08: Pred = FCmpInst::FCMP_UEQ; IsSignaling = false; break;
16326 case 0x09: Pred = FCmpInst::FCMP_ULT; IsSignaling = true; break;
16327 case 0x0a: Pred = FCmpInst::FCMP_ULE; IsSignaling = true; break;
16328 case 0x0b: Pred = FCmpInst::FCMP_FALSE; IsSignaling = false; break;
16329 case 0x0c: Pred = FCmpInst::FCMP_ONE; IsSignaling = false; break;
16330 case 0x0d: Pred = FCmpInst::FCMP_OGE; IsSignaling = true; break;
16331 case 0x0e: Pred = FCmpInst::FCMP_OGT; IsSignaling = true; break;
16332 case 0x0f: Pred = FCmpInst::FCMP_TRUE; IsSignaling = false; break;
16338 IsSignaling = !IsSignaling;
16415 if (IsSignaling)
16422 return getVectorFCmpIR(Pred, IsSignaling);