Lines Matching refs:dev_info
1240 eth_dev_validate_mtu(uint16_t port_id, struct rte_eth_dev_info *dev_info,
1246 if (mtu < dev_info->min_mtu) {
1249 mtu, dev_info->min_mtu, port_id);
1252 if (mtu > dev_info->max_mtu) {
1255 mtu, dev_info->max_mtu, port_id);
1259 overhead_len = eth_dev_get_overhead_len(dev_info->max_rx_pktlen,
1260 dev_info->max_mtu);
1269 if (frame_size > dev_info->max_rx_pktlen) {
1272 frame_size, dev_info->max_rx_pktlen, port_id);
1285 struct rte_eth_dev_info dev_info;
1323 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1351 ret = rte_eth_dev_info_get(port_id, &dev_info);
1362 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1365 nb_tx_q = dev_info.default_txportconf.nb_queues;
1391 if (nb_rx_q > dev_info.max_rx_queues) {
1393 port_id, nb_rx_q, dev_info.max_rx_queues);
1398 if (nb_tx_q > dev_info.max_tx_queues) {
1400 port_id, nb_tx_q, dev_info.max_tx_queues);
1423 (dev_info.max_mtu == 0) ? RTE_ETHER_MTU :
1424 RTE_MIN(dev_info.max_mtu, RTE_ETHER_MTU);
1426 ret = eth_dev_validate_mtu(port_id, &dev_info,
1441 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
1442 dev_info.max_mtu);
1449 dev_info.max_lro_pkt_size);
1455 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1461 dev_conf->rxmode.offloads & ~dev_info.rx_offload_capa,
1467 port_id, eth_dev_offload_names(dev_info.rx_offload_capa,
1473 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1479 dev_conf->txmode.offloads & ~dev_info.tx_offload_capa,
1485 port_id, eth_dev_offload_names(dev_info.tx_offload_capa,
1495 if ((dev_info.flow_type_rss_offloads |
1497 dev_info.flow_type_rss_offloads) {
1501 dev_info.flow_type_rss_offloads);
1518 dev_conf->rx_adv_conf.rss_conf.rss_key_len != dev_info.hash_key_size) {
1522 dev_info.hash_key_size);
1528 if ((size_t)algorithm >= CHAR_BIT * sizeof(dev_info.rss_algo_capa) ||
1529 (dev_info.rss_algo_capa & RTE_ETH_HASH_ALGO_TO_CAPA(algorithm)) == 0) {
1533 port_id, algorithm, dev_info.rss_algo_capa);
1614 struct rte_eth_dev_info *dev_info)
1629 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1722 struct rte_eth_dev_info *dev_info,
1728 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR) &&
1730 eth_dev_mac_restore(dev, dev_info);
1751 struct rte_eth_dev_info dev_info;
1776 ret = rte_eth_dev_info_get(port_id, &dev_info);
1783 if ((*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR) &&
1785 eth_dev_mac_restore(dev, &dev_info);
1793 ret = eth_dev_config_restore(dev, &dev_info, restore_flags, port_id);
2078 const struct rte_eth_dev_info *dev_info)
2080 const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
2193 const struct rte_eth_dev_info *dev_info)
2198 if (n_mempools > dev_info->max_rx_mempools) {
2201 n_mempools, dev_info->max_rx_mempools);
2214 dev_info->min_rx_bufsize);
2235 struct rte_eth_dev_info dev_info;
2259 ret = rte_eth_dev_info_get(port_id, &dev_info);
2279 dev_info.min_rx_bufsize);
2285 if (buf_data_size > dev_info.max_rx_bufsize)
2289 port_id, buf_data_size, dev_info.max_rx_bufsize);
2307 &dev_info);
2324 &dev_info);
2334 nb_rx_desc = dev_info.default_rxportconf.ring_size;
2340 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
2341 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
2342 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
2346 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
2347 dev_info.rx_desc_lim.nb_min,
2348 dev_info.rx_desc_lim.nb_align);
2353 !(dev_info.dev_capa &
2365 rx_conf = &dev_info.default_rxconf;
2387 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2393 dev_info.rx_queue_offload_capa,
2399 (dev_info.dev_capa & RTE_ETH_DEV_CAPA_RXQ_SHARE) == 0) {
2416 overhead_len = eth_dev_get_overhead_len(dev_info.max_rx_pktlen,
2417 dev_info.max_mtu);
2424 dev_info.max_lro_pkt_size);
2554 struct rte_eth_dev_info dev_info;
2578 ret = rte_eth_dev_info_get(port_id, &dev_info);
2584 nb_tx_desc = dev_info.default_txportconf.ring_size;
2589 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2590 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2591 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2594 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2595 dev_info.tx_desc_lim.nb_min,
2596 dev_info.tx_desc_lim.nb_align);
2601 !(dev_info.dev_capa &
2613 tx_conf = &dev_info.default_txconf;
2635 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2641 dev_info.tx_queue_offload_capa,
3861 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3876 if (dev_info == NULL) {
3883 * Init dev_info before port_id check since caller does not have
3886 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3887 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3889 dev_info->rx_desc_lim = lim;
3890 dev_info->tx_desc_lim = lim;
3891 dev_info->device = dev->device;
3892 dev_info->min_mtu = RTE_ETHER_MIN_LEN - RTE_ETHER_HDR_LEN -
3894 dev_info->max_mtu = UINT16_MAX;
3895 dev_info->rss_algo_capa = RTE_ETH_HASH_ALGO_CAPA_MASK(DEFAULT);
3896 dev_info->max_rx_bufsize = UINT32_MAX;
3900 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3903 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3908 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3910 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3913 dev_info->driver_name = dev->device->driver->name;
3914 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3915 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3917 dev_info->dev_flags = &dev->data->dev_flags;
3919 rte_ethdev_trace_info_get(port_id, dev_info);
4091 struct rte_eth_dev_info dev_info;
4099 ret = rte_eth_dev_info_get(port_id, &dev_info);
4104 num = RTE_MIN(dev_info.max_mac_addrs, num);
4159 struct rte_eth_dev_info dev_info;
4174 ret = rte_eth_dev_info_get(port_id, &dev_info);
4178 ret = eth_dev_validate_mtu(port_id, &dev_info, mtu);
4295 struct rte_eth_dev_info dev_info;
4356 ret = rte_eth_dev_info_get(port_id, &dev_info);
4361 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
4367 port_id, new_offloads, dev_info.rx_offload_capa,
4524 validate_rx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max,
4529 if (pfc_queue_conf->rx_pause.tx_qid >= dev_info->nb_tx_queues) {
4533 dev_info->nb_tx_queues);
4549 validate_tx_pause_config(struct rte_eth_dev_info *dev_info, uint8_t tc_max,
4554 if (pfc_queue_conf->tx_pause.rx_qid >= dev_info->nb_rx_queues) {
4558 dev_info->nb_rx_queues);
4605 struct rte_eth_dev_info dev_info;
4618 ret = rte_eth_dev_info_get(port_id, &dev_info);
4650 ret = validate_rx_pause_config(&dev_info, pfc_info.tc_max,
4659 ret = validate_tx_pause_config(&dev_info, pfc_info.tc_max,
4810 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
4824 ret = rte_eth_dev_info_get(port_id, &dev_info);
4829 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
4830 dev_info.flow_type_rss_offloads) {
4834 dev_info.flow_type_rss_offloads);
4845 rss_conf->rss_key_len != dev_info.hash_key_size) {
4848 port_id, rss_conf->rss_key_len, dev_info.hash_key_size);
4852 if ((size_t)rss_conf->algorithm >= CHAR_BIT * sizeof(dev_info.rss_algo_capa) ||
4853 (dev_info.rss_algo_capa &
4858 port_id, rss_conf->algorithm, dev_info.rss_algo_capa);
4876 struct rte_eth_dev_info dev_info = { 0 };
4890 ret = rte_eth_dev_info_get(port_id, &dev_info);
4895 rss_conf->rss_key_len < dev_info.hash_key_size) {
4898 port_id, rss_conf->rss_key_len, dev_info.hash_key_size);
5125 struct rte_eth_dev_info dev_info;
5130 ret = rte_eth_dev_info_get(port_id, &dev_info);
5134 for (i = 0; i < dev_info.max_mac_addrs; i++)
5305 struct rte_eth_dev_info dev_info;
5310 ret = rte_eth_dev_info_get(port_id, &dev_info);
5317 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
5412 struct rte_eth_dev_info dev_info;
5419 ret = rte_eth_dev_info_get(port_id, &dev_info);
5425 if (queue_idx > dev_info.max_tx_queues) {
6749 struct rte_eth_dev_info dev_info;
6754 ret = rte_eth_dev_info_get(port_id, &dev_info);
6759 eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
6762 eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);