Lines Matching defs:mly_softc
159 struct mly_softc { struct
161 device_t mly_dev;
162 cdev_t mly_dev_t;
163 struct resource *mly_regs_resource; /* register interface window */
164 int mly_regs_rid; /* resource ID */
165 bus_space_handle_t mly_bhandle; /* bus space handle */
166 bus_space_tag_t mly_btag; /* bus space tag */
167 bus_dma_tag_t mly_parent_dmat; /* parent DMA tag */
168 bus_dma_tag_t mly_buffer_dmat; /* data buffer/command DMA tag */
169 struct resource *mly_irq; /* interrupt */
170 int mly_irq_rid;
171 void *mly_intr; /* interrupt handle */
174 struct mly_sg_entry *mly_sg_table; /* s/g lists */
175 u_int32_t mly_sg_busaddr; /* s/g table base address in bus space */
176 bus_dma_tag_t mly_sg_dmat; /* s/g buffer DMA tag */
177 bus_dmamap_t mly_sg_dmamap; /* map for s/g buffers */
180 int mly_hwif;
183 u_int8_t mly_doorbell_true; /* xor map to make hardware doorbell 'true' bits into 1s */
184 u_int8_t mly_command_mailbox; /* register offsets */
185 u_int8_t mly_status_mailbox;
186 u_int8_t mly_idbr;
187 u_int8_t mly_odbr;
188 u_int8_t mly_error_status;
189 u_int8_t mly_interrupt_status;
190 u_int8_t mly_interrupt_mask;
191 struct mly_mmbox *mly_mmbox; /* kernel-space address of memory mailbox */
192 u_int64_t mly_mmbox_busaddr; /* bus-space address of memory mailbox */
193 bus_dma_tag_t mly_mmbox_dmat; /* memory mailbox DMA tag */
194 bus_dmamap_t mly_mmbox_dmamap; /* memory mailbox DMA map */
195 u_int32_t mly_mmbox_command_index; /* next index to use */
196 u_int32_t mly_mmbox_status_index; /* index we next expect status at */
199 int mly_state;
204 struct mly_ioctl_getcontrollerinfo *mly_controllerinfo;
205 struct mly_param_controller *mly_controllerparam;
206 struct mly_btl mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS];
209 struct mly_command mly_command[MLY_MAX_COMMANDS]; /* commands */
210 union mly_command_packet *mly_packet; /* command packets */
211 bus_dma_tag_t mly_packet_dmat; /* packet DMA tag */
212 bus_dmamap_t mly_packetmap; /* packet DMA map */
213 u_int64_t mly_packetphys; /* packet array base address */
217 struct mly_qstat mly_qstat[MLYQ_COUNT]; /* queue statistics */
220 u_int32_t mly_event_change; /* event status change indicator */
221 u_int32_t mly_event_counter; /* next event for which we anticpiate status */
222 u_int32_t mly_event_waiting; /* next event the controller will post status for */
223 struct callout mly_periodic; /* periodic event handling */
224 struct callout mly_timeout; /* timeout event handling */
227 struct cam_devq *mly_cam_devq; /* CAM device queue */
228 struct cam_sim *mly_cam_sim[MLY_MAX_CHANNELS]; /* CAM SIMs */
229 int mly_cam_channels; /* total channel count */
232 struct task mly_task_complete; /* deferred-completion task */
233 int mly_qfrzn_cnt; /* Track simq freezes */