Lines Matching refs:sclk
276 a_n = (int)state->medium.sclk * pi->lmp + in rv770_populate_smc_t()
277 (int)state->low.sclk * (R600_AH_DFLT - pi->rlp); in rv770_populate_smc_t()
278 a_d = (int)state->low.sclk * (100 - (int)pi->rlp) + in rv770_populate_smc_t()
279 (int)state->medium.sclk * pi->lmp; in rv770_populate_smc_t()
284 a_n = (int)state->high.sclk * pi->lhp + (int)state->medium.sclk * in rv770_populate_smc_t()
286 a_d = (int)state->medium.sclk * (100 - (int)pi->rmp) + in rv770_populate_smc_t()
287 (int)state->high.sclk * pi->lhp; in rv770_populate_smc_t()
490 RV770_SMC_SCLK_VALUE *sclk) in rv770_populate_sclk_value() argument
560 sclk->sclk_value = cpu_to_be32(engine_clock); in rv770_populate_sclk_value()
561 sclk->vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv770_populate_sclk_value()
562 sclk->vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv770_populate_sclk_value()
563 sclk->vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv770_populate_sclk_value()
564 sclk->vCG_SPLL_SPREAD_SPECTRUM = cpu_to_be32(cg_spll_spread_spectrum); in rv770_populate_sclk_value()
565 sclk->vCG_SPLL_SPREAD_SPECTRUM_2 = cpu_to_be32(cg_spll_spread_spectrum_2); in rv770_populate_sclk_value()
633 ret = rv740_populate_sclk_value(rdev, pl->sclk, in rv770_convert_power_level_to_smc()
634 &level->sclk); in rv770_convert_power_level_to_smc()
636 ret = rv730_populate_sclk_value(rdev, pl->sclk, in rv770_convert_power_level_to_smc()
637 &level->sclk); in rv770_convert_power_level_to_smc()
639 ret = rv770_populate_sclk_value(rdev, pl->sclk, in rv770_convert_power_level_to_smc()
640 &level->sclk); in rv770_convert_power_level_to_smc()
657 ret = rv740_populate_mclk_value(rdev, pl->sclk, in rv770_convert_power_level_to_smc()
660 ret = rv730_populate_mclk_value(rdev, pl->sclk, in rv770_convert_power_level_to_smc()
663 ret = rv770_populate_mclk_value(rdev, pl->sclk, in rv770_convert_power_level_to_smc()
752 if (state->high.sclk < (state->low.sclk * 0xFF / 0x40)) in rv770_program_memory_timing_parameters()
753 high_clock = state->high.sclk; in rv770_program_memory_timing_parameters()
755 high_clock = (state->low.sclk * 0xFF / 0x40); in rv770_program_memory_timing_parameters()
762 STATE1(64 * high_clock / state->low.sclk) | in rv770_program_memory_timing_parameters()
763 STATE2(64 * high_clock / state->medium.sclk) | in rv770_program_memory_timing_parameters()
764 STATE3(64 * high_clock / state->high.sclk); in rv770_program_memory_timing_parameters()
769 POWERMODE1(rv770_calculate_memory_refresh_rate(rdev, state->low.sclk)) | in rv770_program_memory_timing_parameters()
770 POWERMODE2(rv770_calculate_memory_refresh_rate(rdev, state->medium.sclk)) | in rv770_program_memory_timing_parameters()
771 POWERMODE3(rv770_calculate_memory_refresh_rate(rdev, state->high.sclk)); in rv770_program_memory_timing_parameters()
996 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = cpu_to_be32(spll_func_cntl); in rv770_populate_smc_acpi_state()
997 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = cpu_to_be32(spll_func_cntl_2); in rv770_populate_smc_acpi_state()
998 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = cpu_to_be32(spll_func_cntl_3); in rv770_populate_smc_acpi_state()
1000 table->ACPIState.levels[0].sclk.sclk_value = 0; in rv770_populate_smc_acpi_state()
1056 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in rv770_populate_smc_initial_state()
1058 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in rv770_populate_smc_initial_state()
1060 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in rv770_populate_smc_initial_state()
1062 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = in rv770_populate_smc_initial_state()
1064 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = in rv770_populate_smc_initial_state()
1067 table->initialState.levels[0].sclk.sclk_value = in rv770_populate_smc_initial_state()
1068 cpu_to_be32(initial_state->low.sclk); in rv770_populate_smc_initial_state()
1176 pi->boot_sclk = boot_state->low.sclk; in rv770_init_smc_table()
1447 if (new_state->high.sclk >= current_state->high.sclk) in rv770_set_uvd_clock_before_set_eng_clock()
1464 if (new_state->high.sclk < current_state->high.sclk) in rv770_set_uvd_clock_after_set_eng_clock()
2185 u32 sclk, mclk; in rv7xx_parse_pplib_clock_info() local
2202 sclk = le16_to_cpu(clock_info->evergreen.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2203 sclk |= clock_info->evergreen.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2211 sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); in rv7xx_parse_pplib_clock_info()
2212 sclk |= clock_info->r600.ucEngineClockHigh << 16; in rv7xx_parse_pplib_clock_info()
2221 pl->sclk = sclk; in rv7xx_parse_pplib_clock_info()
2257 pl->sclk = rdev->clock.default_sclk; in rv7xx_parse_pplib_clock_info()
2264 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk; in rv7xx_parse_pplib_clock_info()
2448 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2451 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2454 pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_print_power_state()
2458 pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_print_power_state()
2461 pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_print_power_state()
2464 pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_print_power_state()
2491 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci); in rv770_dpm_debugfs_print_current_performance_level()
2494 current_index, pl->sclk, pl->mclk, pl->vddc); in rv770_dpm_debugfs_print_current_performance_level()
2517 return pl->sclk; in rv770_dpm_get_current_sclk()
2559 return requested_state->low.sclk; in rv770_dpm_get_sclk()
2561 return requested_state->high.sclk; in rv770_dpm_get_sclk()