Lines Matching refs:cpu_transcoder
122 enum transcoder cpu_transcoder, in hsw_dip_data_reg() argument
128 return HSW_TVIDEO_DIP_VSC_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
130 return HSW_TVIDEO_DIP_AVI_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
132 return HSW_TVIDEO_DIP_SPD_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
134 return HSW_TVIDEO_DIP_VS_DATA(cpu_transcoder, i); in hsw_dip_data_reg()
381 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in hsw_write_infoframe() local
382 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); in hsw_write_infoframe()
389 data_reg = hsw_dip_data_reg(dev_priv, cpu_transcoder, type, 0); in hsw_write_infoframe()
396 I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder, in hsw_write_infoframe()
402 I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder, in hsw_write_infoframe()
415 u32 val = I915_READ(HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in hsw_infoframe_enabled()
657 reg = HSW_TVIDEO_DIP_GCP(crtc_state->cpu_transcoder); in intel_hdmi_set_gcp_infoframe()
835 i915_reg_t reg = HSW_TVIDEO_DIP_CTL(crtc_state->cpu_transcoder); in hsw_set_infoframes()