Lines Matching defs:intel_crtc_state

608 struct intel_crtc_state {  struct
609 	struct drm_crtc_state base;
620 	unsigned long quirks;
622 	unsigned fb_bits; /* framebuffers to flip */
623 	bool update_pipe; /* can a fast modeset be performed? */
624 	bool disable_cxsr;
625 	bool update_wm_pre, update_wm_post; /* watermarks are updated */
626 	bool fb_changed; /* fb on any of the planes is changed */
627 	bool fifo_changed; /* FIFO split is changed */
632 	int pipe_src_w, pipe_src_h;
638 	unsigned int pixel_rate;
642 	bool has_pch_encoder;
645 	bool has_infoframe;
650 	enum transcoder cpu_transcoder;
656 	bool limited_color_range;
661 	unsigned int output_types;
664 	bool has_hdmi_sink;
668 	bool has_audio;
674 	bool dither;
682 	bool dither_force_disable;
685 	bool clock_set;
689 	bool sdvo_tv_clock;
696 	bool bw_constrained;
700 	struct dpll dpll;
703 	struct intel_shared_dpll *shared_dpll;
706 	struct intel_dpll_hw_state dpll_hw_state;
709 	struct {
711 	} dsi_pll;
713 	int pipe_bpp;
714 	struct intel_link_m_n dp_m_n;
717 	struct intel_link_m_n dp_m2_n2;
718 	bool has_drrs;
720 	bool has_psr;
721 	bool has_psr2;
728 	int port_clock;
731 	unsigned pixel_multiplier;
733 	uint8_t lane_count;
739 	uint8_t lane_lat_optim_mask;
742 	struct {
746 	} gmch_pfit;
749 	struct {
754 	} pch_pfit;
757 	int fdi_lanes;
758 	struct intel_link_m_n fdi_m_n;
760 	bool ips_enabled;
761 	bool ips_force_disable;
763 	bool enable_fbc;
765 	bool double_wide;
767 	int pbn;
769 	struct intel_crtc_scaler_state scaler_state;
772 	enum i915_pipe hsw_workaround_pipe;
775 	bool disable_lp_wm;
777 	struct intel_crtc_wm_state wm;
780 	uint32_t gamma_mode;
783 	u8 active_planes;
809 	struct intel_crtc_state *config;  argument