136 #define SRI(reg_name, block, id)\  argument
168 #define ipp_regs(id)\  argument
190 #define transform_regs(id)\  argument
212 #define aux_regs(id)\  argument
226 #define hpd_regs(id)\  argument
240 #define link_regs(id)\  argument
257 #define stream_enc_regs(id)\  argument
280 #define opp_regs(id)\  argument
301  #define aux_engine_regs(id)\  argument
316 #define audio_regs(id)\  argument
343 #define clk_src_regs(index, id)\  argument
418 	enum clock_source_id id,  in dce120_clock_source_create()
628 #define SRII(reg_name, block, id)\  argument
665 #define mi_inst_regs(id) { MI_DCE12_REG_LIST(id) }  argument