Lines Matching refs:params
49 #define EXEC_BIOS_CMD_TABLE(fname, params)\ argument
52 (uint32_t *)¶ms) == 0)
111 struct dig_encoder_stream_setup_parameters_v1_5 params = {0}; in encoder_control_digx_v1_5() local
113 params.digid = (uint8_t)(cntl->engine_id); in encoder_control_digx_v1_5()
114 params.action = bp->cmd_helper->encoder_action_to_atom(cntl->action); in encoder_control_digx_v1_5()
116 params.pclk_10khz = cntl->pixel_clock / 10; in encoder_control_digx_v1_5()
117 params.digmode = in encoder_control_digx_v1_5()
121 params.lanenum = (uint8_t)(cntl->lanes_number); in encoder_control_digx_v1_5()
125 params.bitpercolor = PANEL_8BIT_PER_COLOR; in encoder_control_digx_v1_5()
128 params.bitpercolor = PANEL_10BIT_PER_COLOR; in encoder_control_digx_v1_5()
131 params.bitpercolor = PANEL_12BIT_PER_COLOR; in encoder_control_digx_v1_5()
134 params.bitpercolor = PANEL_16BIT_PER_COLOR; in encoder_control_digx_v1_5()
143 params.pclk_10khz = in encoder_control_digx_v1_5()
144 (params.pclk_10khz * 30) / 24; in encoder_control_digx_v1_5()
147 params.pclk_10khz = in encoder_control_digx_v1_5()
148 (params.pclk_10khz * 36) / 24; in encoder_control_digx_v1_5()
151 params.pclk_10khz = in encoder_control_digx_v1_5()
152 (params.pclk_10khz * 48) / 24; in encoder_control_digx_v1_5()
158 if (EXEC_BIOS_CMD_TABLE(digxencodercontrol, params)) in encoder_control_digx_v1_5()
374 struct set_crtc_using_dtd_timing_parameters params = {0}; in set_crtc_using_dtd_timing_v3() local
379 params.crtc_id = atom_controller_id; in set_crtc_using_dtd_timing_v3()
382 params.h_size = cpu_to_le16((uint16_t)bp_params->h_addressable); in set_crtc_using_dtd_timing_v3()
384 params.h_blanking_time = in set_crtc_using_dtd_timing_v3()
388 params.v_size = cpu_to_le16((uint16_t)bp_params->v_addressable); in set_crtc_using_dtd_timing_v3()
390 params.v_blanking_time = in set_crtc_using_dtd_timing_v3()
397 params.h_syncoffset = in set_crtc_using_dtd_timing_v3()
400 params.h_syncwidth = cpu_to_le16((uint16_t)bp_params->h_sync_width); in set_crtc_using_dtd_timing_v3()
405 params.v_syncoffset = in set_crtc_using_dtd_timing_v3()
408 params.v_syncwidth = cpu_to_le16((uint16_t)bp_params->v_sync_width); in set_crtc_using_dtd_timing_v3()
416 params.modemiscinfo = in set_crtc_using_dtd_timing_v3()
417 cpu_to_le16(le16_to_cpu(params.modemiscinfo) | in set_crtc_using_dtd_timing_v3()
421 params.modemiscinfo = in set_crtc_using_dtd_timing_v3()
422 cpu_to_le16(le16_to_cpu(params.modemiscinfo) | in set_crtc_using_dtd_timing_v3()
426 params.modemiscinfo = in set_crtc_using_dtd_timing_v3()
427 cpu_to_le16(le16_to_cpu(params.modemiscinfo) | in set_crtc_using_dtd_timing_v3()
445 params.v_syncoffset = in set_crtc_using_dtd_timing_v3()
446 cpu_to_le16(le16_to_cpu(params.v_syncoffset) + in set_crtc_using_dtd_timing_v3()
453 params.modemiscinfo = in set_crtc_using_dtd_timing_v3()
454 cpu_to_le16(le16_to_cpu(params.modemiscinfo) | in set_crtc_using_dtd_timing_v3()
457 if (EXEC_BIOS_CMD_TABLE(setcrtc_usingdtdtiming, params)) in set_crtc_using_dtd_timing_v3()
496 struct select_crtc_source_parameters_v2_3 params; in select_crtc_source_v3() local
501 memset(¶ms, 0, sizeof(params)); in select_crtc_source_v3()
505 params.crtc_id = atom_controller_id; in select_crtc_source_v3()
511 params.encoder_id = (uint8_t)atom_engine_id; in select_crtc_source_v3()
520 params.encode_mode = in select_crtc_source_v3()
524 params.dst_bpc = (uint8_t)(bp_params->display_output_bit_depth); in select_crtc_source_v3()
526 if (EXEC_BIOS_CMD_TABLE(selectcrtc_source, params)) in select_crtc_source_v3()
565 struct enable_crtc_parameters params = {0}; in enable_crtc_v1() local
569 params.crtc_id = id; in enable_crtc_v1()
574 params.enable = ATOM_ENABLE; in enable_crtc_v1()
576 params.enable = ATOM_DISABLE; in enable_crtc_v1()
578 if (EXEC_BIOS_CMD_TABLE(enablecrtc, params)) in enable_crtc_v1()
714 struct set_dce_clock_ps_allocation_v2_1 params; in set_dce_clock_v2_1() local
719 memset(¶ms, 0, sizeof(params)); in set_dce_clock_v2_1()
726 params.param.dceclksrc = atom_pll_id; in set_dce_clock_v2_1()
727 params.param.dceclktype = atom_clock_type; in set_dce_clock_v2_1()
731 params.param.dceclkflag |= in set_dce_clock_v2_1()
735 params.param.dceclkflag |= in set_dce_clock_v2_1()
739 params.param.dceclkflag |= in set_dce_clock_v2_1()
743 params.param.dceclkflag |= in set_dce_clock_v2_1()
750 params.param.dceclk_10khz = cpu_to_le32( in set_dce_clock_v2_1()
757 if (EXEC_BIOS_CMD_TABLE(setdceclock, params)) { in set_dce_clock_v2_1()
760 params.param.dceclk_10khz) * 10; in set_dce_clock_v2_1()