88 	struct amdgpu_cs_parser *parser;  member
460 	lo = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->data0);  in amdgpu_uvd_get_addr_from_ctx()
461 	hi = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->data1);  in amdgpu_uvd_get_addr_from_ctx()
484 	r = amdgpu_cs_find_mapping(ctx->parser, addr, &bo, &mapping);  in amdgpu_uvd_cs_pass1()
490 	if (!ctx->parser->adev->uvd.address_64_bit) {  in amdgpu_uvd_cs_pass1()
492 		cmd = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->idx) >> 1;  in amdgpu_uvd_cs_pass1()
711 	struct amdgpu_device *adev = ctx->parser->adev;  in amdgpu_uvd_cs_msg()
752 				adev->uvd.filp[i] = ctx->parser->filp;  in amdgpu_uvd_cs_msg()
770 				if (adev->uvd.filp[i] != ctx->parser->filp) {  in amdgpu_uvd_cs_msg()
812 	r = amdgpu_cs_find_mapping(ctx->parser, addr, &bo, &mapping);  in amdgpu_uvd_cs_pass2()
826 	amdgpu_set_ib_value(ctx->parser, ctx->ib_idx, ctx->data0,  in amdgpu_uvd_cs_pass2()
828 	amdgpu_set_ib_value(ctx->parser, ctx->ib_idx, ctx->data1,  in amdgpu_uvd_cs_pass2()
831 	cmd = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->idx) >> 1;  in amdgpu_uvd_cs_pass2()
852 	if (!ctx->parser->adev->uvd.address_64_bit) {  in amdgpu_uvd_cs_pass2()
860 		    (start >> 28) != (ctx->parser->adev->uvd.inst->gpu_addr >> 28)) {  in amdgpu_uvd_cs_pass2()
891 	struct amdgpu_ib *ib = &ctx->parser->job->ibs[ctx->ib_idx];  in amdgpu_uvd_cs_reg()
938 	struct amdgpu_ib *ib = &ctx->parser->job->ibs[ctx->ib_idx];  in amdgpu_uvd_cs_packets()
942 		uint32_t cmd = amdgpu_get_ib_value(ctx->parser, ctx->ib_idx, ctx->idx);  in amdgpu_uvd_cs_packets()
970 int amdgpu_uvd_ring_parse_cs(struct amdgpu_cs_parser *parser, uint32_t ib_idx)  in amdgpu_uvd_ring_parse_cs()  argument
980 	struct amdgpu_ib *ib = &parser->job->ibs[ib_idx];  in amdgpu_uvd_ring_parse_cs()
983 	parser->job->vm = NULL;  in amdgpu_uvd_ring_parse_cs()
992 	ctx.parser = parser;  in amdgpu_uvd_ring_parse_cs()
997 	if (!parser->adev->uvd.address_64_bit) {  in amdgpu_uvd_ring_parse_cs()