Lines Matching refs:uint

95 uint amdgpu_ip_block_mask = 0xffffffff;
109 uint amdgpu_pcie_gen_cap = 0;
110 uint amdgpu_pcie_lane_cap = 0;
111 uint amdgpu_cg_mask = 0xffffffff;
112 uint amdgpu_pg_mask = 0xffffffff;
113 uint amdgpu_sdma_phase_quantum = 32;
117 uint amdgpu_pp_feature_mask = 0xfffd3fff;
128 uint amdgpu_smu_memory_pool_size = 0;
149 module_param_named(gartsize, amdgpu_gart_size, uint, 0600);
260 module_param_named(ip_block_mask, amdgpu_ip_block_mask, uint, 0444);
361 module_param_named(ppfeaturemask, amdgpu_pp_feature_mask, uint, 0444);
369 module_param_named(pcie_gen_cap, amdgpu_pcie_gen_cap, uint, 0444);
377 module_param_named(pcie_lane_cap, amdgpu_pcie_lane_cap, uint, 0444);
385 module_param_named(cg_mask, amdgpu_cg_mask, uint, 0444);
393 module_param_named(pg_mask, amdgpu_pg_mask, uint, 0444);
400 module_param_named(sdma_phase_quantum, amdgpu_sdma_phase_quantum, uint, 0444);
532 module_param_named(smu_memory_pool_size, amdgpu_smu_memory_pool_size, uint, 0444);