Lines Matching defs:amdgpu_nbio_funcs

1267 struct amdgpu_nbio_funcs {  struct
1268 	const struct nbio_hdp_flush_reg *hdp_flush_reg;
1269 	u32 (*get_hdp_flush_req_offset)(struct amdgpu_device *adev);
1270 	u32 (*get_hdp_flush_done_offset)(struct amdgpu_device *adev);
1271 	u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
1272 	u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
1273 	u32 (*get_rev_id)(struct amdgpu_device *adev);
1274 	void (*mc_access_enable)(struct amdgpu_device *adev, bool enable);
1275 	void (*hdp_flush)(struct amdgpu_device *adev, struct amdgpu_ring *ring);
1276 	u32 (*get_memsize)(struct amdgpu_device *adev);
1277 	void (*sdma_doorbell_range)(struct amdgpu_device *adev, int instance,
1279 	void (*enable_doorbell_aperture)(struct amdgpu_device *adev,
1281 	void (*enable_doorbell_selfring_aperture)(struct amdgpu_device *adev,
1283 	void (*ih_doorbell_range)(struct amdgpu_device *adev,
1285 	void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev,
1287 	void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
1289 	void (*get_clockgating_state)(struct amdgpu_device *adev,
1291 	void (*ih_control)(struct amdgpu_device *adev);
1292 	void (*init_registers)(struct amdgpu_device *adev);
1293 	void (*detect_hw_virt)(struct amdgpu_device *adev);