Lines Matching defs:op0

354   rtx op0 = str_rtx;  in store_bit_field_1()  local
880 store_fixed_bit_field (rtx op0, unsigned HOST_WIDE_INT offset, in store_fixed_bit_field()
1063 store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, in store_split_bit_field()
1239 rtx op0 = str_rtx; in extract_bit_field_1() local
1733 extract_fixed_bit_field (enum machine_mode tmode, rtx op0, in extract_fixed_bit_field()
1958 extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize, in extract_split_bit_field()
2937 expand_mult_const (enum machine_mode mode, rtx op0, HOST_WIDE_INT val, in expand_mult_const()
3084 expand_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, in expand_mult()
3229 expand_widening_mult (enum machine_mode mode, rtx op0, rtx op1, rtx target, in expand_widening_mult()
3419 expand_mult_highpart_adjust (enum machine_mode mode, rtx adj_operand, rtx op0, in expand_mult_highpart_adjust()
3463 expand_mult_highpart_optab (enum machine_mode mode, rtx op0, rtx op1, in expand_mult_highpart_optab()
3574 expand_mult_highpart (enum machine_mode mode, rtx op0, rtx op1, in expand_mult_highpart()
3638 expand_smod_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) in expand_smod_pow2()
3740 expand_sdiv_pow2 (enum machine_mode mode, rtx op0, HOST_WIDE_INT d) in expand_sdiv_pow2()
3855 rtx op0, rtx op1, rtx target, int unsignedp) in expand_divmod()
5092 expand_and (enum machine_mode mode, rtx op0, rtx op1, rtx target) in expand_and()
5116 rtx op0, last, comparison, subtarget; in emit_cstore() local
5211 emit_store_flag_1 (rtx target, enum rtx_code code, rtx op0, rtx op1, in emit_store_flag_1()
5414 emit_store_flag (rtx target, enum rtx_code code, rtx op0, rtx op1, in emit_store_flag()
5737 emit_store_flag_force (rtx target, enum rtx_code code, rtx op0, rtx op1, in emit_store_flag_force()