#
a49496fb |
| 21-May-2019 |
Dan Gohman <dan433584@gmail.com> |
[WebAssembly] Add the signature for the new llround builtin function
r360889 added new llround builtin functions. This patch adds their signatures for the WebAssembly backend.
It also adds wasm32 s
[WebAssembly] Add the signature for the new llround builtin function
r360889 added new llround builtin functions. This patch adds their signatures for the WebAssembly backend.
It also adds wasm32 support to utils/update_llc_test_checks.py, since that's the script other targets are using for their testcases for this feature.
Differential Revision: https://reviews.llvm.org/D62207
llvm-svn: 361327
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#
98092f37 |
| 18-May-2019 |
Roman Lebedev <lebedev.ri@gmail.com> |
UpdateTestChecks: fix AMDGPU handling
Summary: Was looking into supporting `(srl (shl x, c1), c2)` with c1 != c2 in dagcombiner, this test changes, but makes `update_llc_test_checks.py` unhappy.
**
UpdateTestChecks: fix AMDGPU handling
Summary: Was looking into supporting `(srl (shl x, c1), c2)` with c1 != c2 in dagcombiner, this test changes, but makes `update_llc_test_checks.py` unhappy.
**Many** AMDGPU tests specify `-march`, not `-mtriple`, which results in `update_llc_test_checks.py` defaulting to x86 asm function detection heuristics, which don't work here. I propose to fix this by adding an infrastructure to map from `-march` to `-mtriple`, in the UpdateTestChecks tooling.
Reviewers: RKSimon, MaskRay, arsenm
Reviewed By: arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62099
llvm-svn: 361101
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#
822b9c97 |
| 18-May-2019 |
Roman Lebedev <lebedev.ri@gmail.com> |
UpdateTestChecks: arm64-eabi handlind
Summary: Was looking into supporting `(srl (shl x, c1), c2)` with c1 != c2 in dagcombiner, this test changes, but makes `update_llc_test_checks.py` unhappy
Rev
UpdateTestChecks: arm64-eabi handlind
Summary: Was looking into supporting `(srl (shl x, c1), c2)` with c1 != c2 in dagcombiner, this test changes, but makes `update_llc_test_checks.py` unhappy
Reviewers: RKSimon
Reviewed By: RKSimon
Subscribers: javed.absar, kristof.beyls, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62097
llvm-svn: 361100
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Revision tags: llvmorg-8.0.1-rc1 |
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#
6da0989c |
| 29-Apr-2019 |
Martin Storsjo <martin@martin.st> |
[UpdateTestChecks] Allow Lbegin_func without a leading period
On mingw/i686, local labels don't start with a leading period.
Also escape the leading period, as it previously could match any char.
[UpdateTestChecks] Allow Lbegin_func without a leading period
On mingw/i686, local labels don't start with a leading period.
Also escape the leading period, as it previously could match any char.
Differential Revision: https://reviews.llvm.org/D61254
llvm-svn: 359497
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Revision tags: llvmorg-8.0.0, llvmorg-8.0.0-rc5, llvmorg-8.0.0-rc4 |
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#
1ed7d8ae |
| 01-Mar-2019 |
Oliver Stannard <oliver.stannard@arm.com> |
[ARM] Add armv8a triple to test check updaters
llvm-svn: 355186
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Revision tags: llvmorg-8.0.0-rc3, llvmorg-7.1.0, llvmorg-7.1.0-rc1, llvmorg-8.0.0-rc2, llvmorg-8.0.0-rc1, llvmorg-7.0.1, llvmorg-7.0.1-rc3, llvmorg-7.0.1-rc2, llvmorg-7.0.1-rc1 |
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#
fce57f58 |
| 26-Oct-2018 |
Nemanja Ivanovic <nemanja.i.ibm@gmail.com> |
[NFC] Fix the regular expression for BE PPC in update_llc_test_checks.py
Currently, the regular expression that matches the lines of assembly for PPC LE (ELFv2) does not work for the assembly for BE
[NFC] Fix the regular expression for BE PPC in update_llc_test_checks.py
Currently, the regular expression that matches the lines of assembly for PPC LE (ELFv2) does not work for the assembly for BE (ELFv1). This patch fixes it.
Differential revision: https://reviews.llvm.org/D53059
llvm-svn: 345363
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Revision tags: llvmorg-7.0.0, llvmorg-7.0.0-rc3, llvmorg-7.0.0-rc2, llvmorg-7.0.0-rc1 |
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#
980c4df0 |
| 23-Jul-2018 |
Reid Kleckner <rnk@google.com> |
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
Don't try to generate large PIC code for non-ELF targets. Neither COFF nor MachO have relocations for large position
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
Don't try to generate large PIC code for non-ELF targets. Neither COFF nor MachO have relocations for large position independent code, and users have been using "large PIC" code models to JIT 64-bit code for a while now. With this change, if they are generating ELF code, their JITed code will truly be PIC, but if they target MachO or COFF, it will contain 64-bit immediates that directly reference external symbols. For a JIT, that's perfectly fine.
llvm-svn: 337740
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#
d86aad69 |
| 13-Jul-2018 |
Chandler Carruth <chandlerc@gmail.com> |
[UpdateTestChecks] Teach the x86 asm parser to skip over the function begin label emitted for some routines with personality functions and such.
Without this, we don't even recognize such functions
[UpdateTestChecks] Teach the x86 asm parser to skip over the function begin label emitted for some routines with personality functions and such.
Without this, we don't even recognize such functions as appearing in the output and so don't attach any assertions to them. Happy to tweak this or improve it if folks w/ deeper knowledge of the asm sequences that show up here want.
llvm-svn: 336987
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#
b757fc38 |
| 28-Jun-2018 |
Jonas Devlieghere <jonas@devlieghere.com> |
Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models""
Reverting because this is causing failures in the LLDB test suite on GreenDragon.
LLVM ERROR: unsupporte
Revert "Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models""
Reverting because this is causing failures in the LLDB test suite on GreenDragon.
LLVM ERROR: unsupported relocation with subtraction expression, symbol '__GLOBAL_OFFSET_TABLE_' can not be undefined in a subtraction expression
llvm-svn: 335894
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#
88fee5fd |
| 25-Jun-2018 |
Reid Kleckner <rnk@google.com> |
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
The large code model allows code and data segments to exceed 2GB, which means that some symbol references may requir
Re-land r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
The large code model allows code and data segments to exceed 2GB, which means that some symbol references may require a displacement that cannot be encoded as a displacement from RIP. The large PIC model even relaxes the assumption that the GOT itself is within 2GB of all code. Therefore, we need a special code sequence to materialize it: .LtmpN: leaq .LtmpN(%rip), %rbx movabsq $_GLOBAL_OFFSET_TABLE_-.LtmpN, %rax # Scratch addq %rax, %rbx # GOT base reg
From that, non-local references go through the GOT base register instead of being PC-relative loads. Local references typically use GOTOFF symbols, like this: movq extern_gv@GOT(%rbx), %rax movq local_gv@GOTOFF(%rbx), %rax
All calls end up being indirect: movabsq $local_fn@GOTOFF, %rax addq %rbx, %rax callq *%rax
The medium code model retains the assumption that the code segment is less than 2GB, so calls are once again direct, and the RIP-relative loads can be used to access the GOT. Materializing the GOT is easy: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rbx # GOT base reg
DSO local data accesses will use it: movq local_gv@GOTOFF(%rbx), %rax
Non-local data accesses will use RIP-relative addressing, which means we may not always need to materialize the GOT base: movq extern_gv@GOTPCREL(%rip), %rax
Direct calls are basically the same as they are in the small code model: They use direct, PC-relative addressing, and the PLT is used for calls to non-local functions.
This patch adds reasonably comprehensive testing of LEA, but there are lots of interesting folding opportunities that are unimplemented.
I restricted the MCJIT/eh-lg-pic.ll test to Linux, since the large PIC code model is not implemented for MachO yet.
Differential Revision: https://reviews.llvm.org/D47211
llvm-svn: 335508
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#
3a2fd1c2 |
| 21-Jun-2018 |
Reid Kleckner <rnk@google.com> |
Revert r335297 "[X86] Implement more of x86-64 large and medium PIC code models"
MCJIT can't handle R_X86_64_GOT64 yet.
llvm-svn: 335300
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#
247fe6ae |
| 21-Jun-2018 |
Reid Kleckner <rnk@google.com> |
[X86] Implement more of x86-64 large and medium PIC code models
Summary: The large code model allows code and data segments to exceed 2GB, which means that some symbol references may require a displ
[X86] Implement more of x86-64 large and medium PIC code models
Summary: The large code model allows code and data segments to exceed 2GB, which means that some symbol references may require a displacement that cannot be encoded as a displacement from RIP. The large PIC model even relaxes the assumption that the GOT itself is within 2GB of all code. Therefore, we need a special code sequence to materialize it: .LtmpN: leaq .LtmpN(%rip), %rbx movabsq $_GLOBAL_OFFSET_TABLE_-.LtmpN, %rax # Scratch addq %rax, %rbx # GOT base reg
From that, non-local references go through the GOT base register instead of being PC-relative loads. Local references typically use GOTOFF symbols, like this: movq extern_gv@GOT(%rbx), %rax movq local_gv@GOTOFF(%rbx), %rax
All calls end up being indirect: movabsq $local_fn@GOTOFF, %rax addq %rbx, %rax callq *%rax
The medium code model retains the assumption that the code segment is less than 2GB, so calls are once again direct, and the RIP-relative loads can be used to access the GOT. Materializing the GOT is easy: leaq _GLOBAL_OFFSET_TABLE_(%rip), %rbx # GOT base reg
DSO local data accesses will use it: movq local_gv@GOTOFF(%rbx), %rax
Non-local data accesses will use RIP-relative addressing, which means we may not always need to materialize the GOT base: movq extern_gv@GOTPCREL(%rip), %rax
Direct calls are basically the same as they are in the small code model: They use direct, PC-relative addressing, and the PLT is used for calls to non-local functions.
This patch adds reasonably comprehensive testing of LEA, but there are lots of interesting folding opportunities that are unimplemented.
Reviewers: chandlerc, echristo
Subscribers: hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D47211
llvm-svn: 335297
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Revision tags: llvmorg-6.0.1, llvmorg-6.0.1-rc3 |
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#
dbd98b3a |
| 11-Jun-2018 |
Roman Lebedev <lebedev.ri@gmail.com> |
[Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples
Summary: Lack of that support has taken me by surprise. I need to add (or at least look at) some tests for https://rev
[Utils] update_llc_test_checks.py: support AMDGPU backend: AMDGCN, r600 triples
Summary: Lack of that support has taken me by surprise. I need to add (or at least look at) some tests for https://reviews.llvm.org/D47980#1127615, and i don't really fancy doing that by hand.
The asm pattern is quite similar to that of x86: https://godbolt.org/g/hfgeds just with `#` replaced with `;`
Reviewers: spatel, RKSimon, MaskRay, tstellar, arsenm
Reviewed By: arsenm
Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, rampitec, bogner, mareko, llvm-commits
Tags: #amdgpu
Differential Revision: https://reviews.llvm.org/D48001
llvm-svn: 334396
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Revision tags: llvmorg-6.0.1-rc2 |
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#
ee769444 |
| 01-Jun-2018 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[Utils][X86] Help update_llc_test_checks.py to recognise retl/retq to reduce CHECK duplication (PR35003)
This patch replaces the --x86_extra_scrub command line argument to automatically support a se
[Utils][X86] Help update_llc_test_checks.py to recognise retl/retq to reduce CHECK duplication (PR35003)
This patch replaces the --x86_extra_scrub command line argument to automatically support a second level of regex-scrubbing if it improves the matching of nearly-identical code patterns. The argument '--extra_scrub' is there now to force extra matching if required.
This is mostly useful to help us share 32-bit/64-bit x86 vector tests which only differs by retl/retq instructions, but any scrubber can now technically support this, meaning test checks don't have to be needlessly obfuscated.
I've updated some of the existing checks that had been manually run with --x86_extra_scrub, to demonstrate the extra "ret{{[l|q]}}" scrub now only happens when useful, and re-run the sse42-intrinsics file to show extra matches - most sse/avx intrinsics files should be able to now share 32/64 checks.
Tested with the opt/analysis scripts as well which share common code - AFAICT the other update scripts use their own versions.
Differential Revision: https://reviews.llvm.org/D47485
llvm-svn: 333749
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#
21d9c70b |
| 20-Apr-2018 |
Sanjay Patel <spatel@rotateright.com> |
[utils] improve AArch64 asm parser
If we don't mark the cfi line as optional, the script won't work with 'nounwind' code. Without that attr, there may be extra noise in the asm body that we don't wa
[utils] improve AArch64 asm parser
If we don't mark the cfi line as optional, the script won't work with 'nounwind' code. Without that attr, there may be extra noise in the asm body that we don't want to see.
llvm-svn: 330453
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#
1c8fb185 |
| 20-Apr-2018 |
Daniel Cederman <cederman@gaisler.com> |
Add SPARC support to update_llc_test_checks.py
Reviewers: spatel, jyknight
Reviewed By: spatel
Subscribers: fedor.sergeev, llvm-commits
Differential Revision: https://reviews.llvm.org/D45809
llv
Add SPARC support to update_llc_test_checks.py
Reviewers: spatel, jyknight
Reviewed By: spatel
Subscribers: fedor.sergeev, llvm-commits
Differential Revision: https://reviews.llvm.org/D45809
llvm-svn: 330401
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Revision tags: llvmorg-6.0.1-rc1 |
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#
5334a2c5 |
| 06-Apr-2018 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[UpdateTestChecks] Add update_analyze_test_checks.py for cost model analysis generation
The script allows the auto-generation of checks for cost model tests to speed up their creation and help impro
[UpdateTestChecks] Add update_analyze_test_checks.py for cost model analysis generation
The script allows the auto-generation of checks for cost model tests to speed up their creation and help improve coverage, which will help a lot with PR36550.
If the need arises we can add support for other analyze passes as well, but the cost models was the one I needed to get done - at the moment it just warns that any other analysis mode is unsupported.
I've regenerated a couple of x86 test files to show the effect.
Differential Revision: https://reviews.llvm.org/D45272
llvm-svn: 329390
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#
82962298 |
| 05-Apr-2018 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[UpdateTestChecks] Moved core functionality of add_asm_checks into add_checks
As discussed on D45272
llvm-svn: 329270
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#
702ec04f |
| 05-Apr-2018 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
[UpdateTestChecks] Make add_asm_checks more like add_ir_checks
Towards merging them as mentioned on D45272
llvm-svn: 329265
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#
ff2f4fcd |
| 03-Apr-2018 |
Chandler Carruth <chandlerc@gmail.com> |
[x86] Fix a pretty obvious think-o with my asm scrubbing. You have to in fact use regular expression syntax to use regular expressions.
Should restore the bots. Sorry for the noise on this test.
Th
[x86] Fix a pretty obvious think-o with my asm scrubbing. You have to in fact use regular expression syntax to use regular expressions.
Should restore the bots. Sorry for the noise on this test.
Thanks to Philip for spotting the bug!
llvm-svn: 329057
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#
6646becd |
| 03-Apr-2018 |
Chandler Carruth <chandlerc@gmail.com> |
[x86] Extend my goofy SP offset scrubbing for llc test cases to actually do explicit scrubbing of the offsets of stack spills and reloads.
You can always turn this off in order to test specific stac
[x86] Extend my goofy SP offset scrubbing for llc test cases to actually do explicit scrubbing of the offsets of stack spills and reloads.
You can always turn this off in order to test specific stack slot usage. We were already hiding most of this, but the new logic hides it more generically. Notably, we should effectively hide stack slot churn in functions that have a frame pointer now, and should also hide it when changing a function from stack pointer to frame pointer. That transition already changes enough to be clearly noticed in the test case diff, showing *every* spill and reload is really noisy without benefit. See the test case I ran this on as a classic example.
llvm-svn: 329055
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Revision tags: llvmorg-5.0.2, llvmorg-5.0.2-rc2, llvmorg-5.0.2-rc1 |
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#
0a301a19 |
| 02-Mar-2018 |
Fangrui Song <maskray@google.com> |
[utils] Add utils/update_cc_test_checks.py
A utility to update LLVM IR in C/C++ FileCheck test files.
Example RUN lines in .c/.cc test files:
// RUN: %clang -S -Os -DXX %s -o - | FileCheck %s // R
[utils] Add utils/update_cc_test_checks.py
A utility to update LLVM IR in C/C++ FileCheck test files.
Example RUN lines in .c/.cc test files:
// RUN: %clang -S -Os -DXX %s -o - | FileCheck %s // RUN: %clangxx -S -Os %s -o - | FileCheck -check-prefix=IR %s
Usage:
% utils/update_cc_test_checks.py --llvm-bin=release/bin test/a.cc % utils/update_cc_test_checks.py --c-index-test=release/bin/c-index-test --clang=release/bin/clang /tmp/c/a.cc
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang -emit-llvm -S -Os -DXX %s -o - | FileCheck -check-prefix=AA %s // RUN: %clangxx -emit-llvm -S -Os %s -o - | FileCheck -check-prefix=BB %s using T = #ifdef XX int __attribute__((vector_size(16))) #else short __attribute__((vector_size(16))) #endif ;
// AA-LABEL: _Z3fooDv4_i: // AA: entry: // AA-NEXT: %add = shl <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> // AA-NEXT: ret <4 x i32> %add // // BB-LABEL: _Z3fooDv8_s: // BB: entry: // BB-NEXT: %add = shl <8 x i16> %a, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> // BB-NEXT: ret <8 x i16> %add T foo(T a) { return a + a; }
Differential Revision: https://reviews.llvm.org/D42712
llvm-svn: 326591
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Revision tags: llvmorg-6.0.0, llvmorg-6.0.0-rc3 |
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#
4f0f426d |
| 10-Feb-2018 |
Fangrui Song <maskray@google.com> |
[utils] Refactor utils/update_{,llc_}test_checks.py to share more code
Summary: This revision refactors 1. parser 2. CHECK line adder of utils/update_{,llc_}test_checks.py so that thir functionality
[utils] Refactor utils/update_{,llc_}test_checks.py to share more code
Summary: This revision refactors 1. parser 2. CHECK line adder of utils/update_{,llc_}test_checks.py so that thir functionality can be re-used by other utility scripts (e.g. D42712)
Reviewers: asb, craig.topper, RKSimon, echristo
Subscribers: llvm-commits, spatel
Differential Revision: https://reviews.llvm.org/D42805
llvm-svn: 324803
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Revision tags: llvmorg-6.0.0-rc2 |
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#
ee4e2e71 |
| 30-Jan-2018 |
Fangrui Song <maskray@google.com> |
[utils] De-duplicate utils/update_{llc_,}test_checks.py
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D42654
llvm-svn: 323718
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