History log of /llvm-project/llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp (Results 51 – 75 of 88)
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# ccf49b9e 20-Mar-2020 Dominik Montada <dominik.montada@hightec-rt.com>

[GlobalISel] support widen unmerge if WideTy > SrcTy

Summary:
Widening G_UNMERGE_VALUES to a type which is larger than the
original source type is the same as widening it to the same
type as the sou

[GlobalISel] support widen unmerge if WideTy > SrcTy

Summary:
Widening G_UNMERGE_VALUES to a type which is larger than the
original source type is the same as widening it to the same
type as the source type: in both cases, G_UNMERGE_VALUES has
to be replaced with bit arithmetic which. Although the arithmetic
itself is independent of whether the source type is smaller
or equal to the widen type, widening the source type to the
widen type should result in less artifacts being emitted,
since this is the type that the user explicitly requested.

Reviewers: arsenm, dsanders, aemerson, aditya_nandakumar

Reviewed By: arsenm, dsanders

Subscribers: jvesely, wdng, nhaehnle, rovka, hiraditya, volkan, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76494

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# 2e773626 14-Feb-2020 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix lower bswap for vectors

This would hit an assertion from trying to use the wrong bitwidth for
the constants.


# 19a03501 14-Mar-2020 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix round lowering

I used the implementation for floor instead of round. It also turns
out the OpenCL builtin library wasn't using the round builtin, but
implemented the expanded form.


# 8ff2dcb1 11-Mar-2020 Dominik Montada <dominik.montada@hightec-rt.com>

[GlobalISel] add additional lowering support for G_INSERT

Summary: Add lowering support for inserting pointers or scalars into scalars, vectors or pointers

Reviewers: arsenm, dsanders

Reviewed By:

[GlobalISel] add additional lowering support for G_INSERT

Summary: Add lowering support for inserting pointers or scalars into scalars, vectors or pointers

Reviewers: arsenm, dsanders

Reviewed By: arsenm

Subscribers: jvesely, wdng, nhaehnle, rovka, hiraditya, volkan, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75994

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# 6b96623d 12-Mar-2020 Dominik Montada <dominik.montada@hightec-rt.com>

[GlobalISel] fix crash in narrowScalarExtract if DstRegs only has one register

Summary: When narrowing a scalar G_EXTRACT where the destination lines up perfectly with a single result of the emitted

[GlobalISel] fix crash in narrowScalarExtract if DstRegs only has one register

Summary: When narrowing a scalar G_EXTRACT where the destination lines up perfectly with a single result of the emitted G_UNMERGE_VALUES a COPY should be emitted instead of unconditionally trying to emit a G_MERGE_VALUES.

Reviewers: arsenm, dsanders

Reviewed By: arsenm

Subscribers: wdng, rovka, hiraditya, volkan, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D75743

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# feb20a15 02-Mar-2020 Dominik Montada <dominik.montada@hightec-rt.com>

[GlobalISel] add missing libcalls and 128-bit support for floating points

Add libcall support for G_FMINNUM, G_FMAXNUM, G_FSQRT, G_FRINT, G_FNEARBYINT.
Add 128-bit libcall support for all simple lib

[GlobalISel] add missing libcalls and 128-bit support for floating points

Add libcall support for G_FMINNUM, G_FMAXNUM, G_FSQRT, G_FRINT, G_FNEARBYINT.
Add 128-bit libcall support for all simple libcalls.

Reviewers: arsenm, Petar.Avramovic, dsanders, petarj, paquette

Subscribers: wdng, rovka, hiraditya, volkan, llvm-commits

Differential Revision: https://reviews.llvm.org/D75516

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# 6135f5ed 07-Feb-2020 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix narrowing of G_CTLZ/G_CTTZ

The result type is separate from the source type.


# 7df5fc9e 07-Feb-2020 Petar Avramovic <Petar.Avramovic@rt-rk.com>

[GlobalISel] Add buildMerge with SrcOp initializer list

Allows more flexible use of buildMerge in places where
use operands are available as SrcOp since it does not
require explicit conversion to Re

[GlobalISel] Add buildMerge with SrcOp initializer list

Allows more flexible use of buildMerge in places where
use operands are available as SrcOp since it does not
require explicit conversion to Register.
Simplify code with new buildMerge.

Differential Revision: https://reviews.llvm.org/D74223

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# 8de2dad9 07-Feb-2020 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix lowering of G_CTLZ/G_CTTZ

The type passed to lower was invalid, so I'm not sure how this was
even working before. The source and destination type also do not have
to match, so make s

GlobalISel: Fix lowering of G_CTLZ/G_CTTZ

The type passed to lower was invalid, so I'm not sure how this was
even working before. The source and destination type also do not have
to match, so make sure to use the right ones.

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# 76986bdc 06-Feb-2020 Konstantin Schwarz <konstantin.schwarz@hightec-rt.com>

[GlobalISel] Legalize more G_FP(EXT|TRUNC) libcalls.

This adds a new helper function for retrieving the
floating point type corresponding to the specified
bit-width.


Revision tags: llvmorg-10.0.0-rc1, llvmorg-11-init, llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1, llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2
# 0a317df5 09-Aug-2019 Daniel Sanders <daniel_l_sanders@apple.com>

Remove leftover MF->dump()'s from r368487 that break release builds

llvm-svn: 368489


# e9a57c2b 09-Aug-2019 Daniel Sanders <daniel_l_sanders@apple.com>

[globalisel] Add G_SEXT_INREG

Summary:
Targets often have instructions that can sign-extend certain cases faster
than the equivalent shift-left/arithmetic-shift-right. Such cases can be
identified b

[globalisel] Add G_SEXT_INREG

Summary:
Targets often have instructions that can sign-extend certain cases faster
than the equivalent shift-left/arithmetic-shift-right. Such cases can be
identified by matching a shift-left/shift-right pair but there are some
issues with this in the context of combines. For example, suppose you can
sign-extend 8-bit up to 32-bit with a target extend instruction.
%1:_(s32) = G_SHL %0:_(s32), i32 24 # (I've inlined the G_CONSTANT for brevity)
%2:_(s32) = G_ASHR %1:_(s32), i32 24
%3:_(s32) = G_ASHR %2:_(s32), i32 1
would reasonably combine to:
%1:_(s32) = G_SHL %0:_(s32), i32 24
%2:_(s32) = G_ASHR %1:_(s32), i32 25
which no longer matches the special case. If your shifts and extend are
equal cost, this would break even as a pair of shifts but if your shift is
more expensive than the extend then it's cheaper as:
%2:_(s32) = G_SEXT_INREG %0:_(s32), i32 8
%3:_(s32) = G_ASHR %2:_(s32), i32 1
It's possible to match the shift-pair in ISel and emit an extend and ashr.
However, this is far from the only way to break this shift pair and make
it hard to match the extends. Another example is that with the right
known-zeros, this:
%1:_(s32) = G_SHL %0:_(s32), i32 24
%2:_(s32) = G_ASHR %1:_(s32), i32 24
%3:_(s32) = G_MUL %2:_(s32), i32 2
can become:
%1:_(s32) = G_SHL %0:_(s32), i32 24
%2:_(s32) = G_ASHR %1:_(s32), i32 23

All upstream targets have been configured to lower it to the current
G_SHL,G_ASHR pair but will likely want to make it legal in some cases to
handle their faster cases.

To follow-up: Provide a way to legalize based on the constant. At the
moment, I'm thinking that the best way to achieve this is to provide the
MI in LegalityQuery but that opens the door to breaking core principles
of the legalizer (legality is not context sensitive). That said, it's
worth noting that looking at other instructions and acting on that
information doesn't violate this principle in itself. It's only a
violation if, at the end of legalization, a pass that checks legality
without being able to see the context would say an instruction might not be
legal. That's a fairly subtle distinction so to give a concrete example,
saying %2 in:
%1 = G_CONSTANT 16
%2 = G_SEXT_INREG %0, %1
is legal is in violation of that principle if the legality of %2 depends
on %1 being constant and/or being 16. However, legalizing to either:
%2 = G_SEXT_INREG %0, 16
or:
%1 = G_CONSTANT 16
%2:_(s32) = G_SHL %0, %1
%3:_(s32) = G_ASHR %2, %1
depending on whether %1 is constant and 16 does not violate that principle
since both outputs are genuinely legal.

Reviewers: bogner, aditya_nandakumar, volkan, aemerson, paquette, arsenm

Subscribers: sdardis, jvesely, wdng, nhaehnle, rovka, kristof.beyls, javed.absar, hiraditya, jrtc27, atanasyan, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D61289

llvm-svn: 368487

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# c8ac029d 06-Aug-2019 Aditya Nandakumar <aditya_nandakumar@apple.com>

[GISel]: Add GISelKnownBits analysis

https://reviews.llvm.org/D65698

This adds a KnownBits analysis pass for GISel. This was done as a
pass (compared to static functions) so that we can add other f

[GISel]: Add GISelKnownBits analysis

https://reviews.llvm.org/D65698

This adds a KnownBits analysis pass for GISel. This was done as a
pass (compared to static functions) so that we can add other features
such as caching queries(within a pass and across passes) in the future.
This patch only adds the basic pass boiler plate, and implements a lazy
non caching knownbits implementation (ported from SelectionDAG). I've
also hooked up the AArch64PreLegalizerCombiner pass to use this - there
should be no compile time regression as the analysis is lazy.

llvm-svn: 368065

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# 5faa533e 01-Aug-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix widenScalar for G_MERGE_VALUES to pointer

AMDGPU testcase isn't broken now, but will be in a future patch
without this.

llvm-svn: 367591


Revision tags: llvmorg-9.0.0-rc1
# 9ad917c2 18-Jul-2019 Michael Liao <michael.hliao@gmail.com>

Minor styling fix. NFC.

llvm-svn: 366456


Revision tags: llvmorg-10-init
# 0966dd0d 17-Jul-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Handle widenScalar of arbitrary G_MERGE_VALUES sources

Extract the sources to the GCD of the original size and target size,
padding with implicit_def as necessary.

Also fix the case whe

GlobalISel: Handle widenScalar of arbitrary G_MERGE_VALUES sources

Extract the sources to the GCD of the original size and target size,
padding with implicit_def as necessary.

Also fix the case where the requested source type is wider than the
original result type. This was ignoring the type, and just using the
destination. Do the operation in the requested type and truncate back.

llvm-svn: 366367

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# 914a59ca 17-Jul-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Handle more cases for widenScalar of G_MERGE_VALUES

Use an anyext to the requested type for the leftover operand to
produce a slightly wider type, and then truncate the final merge.

I h

GlobalISel: Handle more cases for widenScalar of G_MERGE_VALUES

Use an anyext to the requested type for the leftover operand to
produce a slightly wider type, and then truncate the final merge.

I have another implementation almost ready which handles arbitrary
widens, but I think it produces worse code in this example (which I
think is 90% due to not folding redundant copies or folding out
implicit_def users), so I wanted to add this as a baseline first.

llvm-svn: 366366

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Revision tags: llvmorg-8.0.1, llvmorg-8.0.1-rc4
# bd791b57 08-Jul-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: widenScalar for G_BUILD_VECTOR

llvm-svn: 365320


# 6f74f557 01-Jul-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Implement lower for min/max

llvm-svn: 364816


Revision tags: llvmorg-8.0.1-rc3
# 5a321b89 17-Jun-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Use the original flags when lowering fneg to fsub

This was ignoring the flag on fneg, and using the source instruction's
flags. Also fixes tests missing from r358702.

Note the expansion

GlobalISel: Use the original flags when lowering fneg to fsub

This was ignoring the flag on fneg, and using the source instruction's
flags. Also fixes tests missing from r358702.

Note the expansion itself isn't correct without nnan, but that should
be fixed separately.

llvm-svn: 363637

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Revision tags: llvmorg-8.0.1-rc2, llvmorg-8.0.1-rc1, llvmorg-8.0.0, llvmorg-8.0.0-rc5, llvmorg-8.0.0-rc4
# d3093c2f 28-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Implement fewerElementsVector for phi

llvm-svn: 355048


Revision tags: llvmorg-8.0.0-rc3
# 26b7e859 19-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Implement moreElementsVector for bit ops

llvm-svn: 354345


# debaf4bd 18-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix double count of offset for irregular vector breakdowns

Fixes cases with odd vectors that break into multiple requested size
pieces.

llvm-svn: 354280


Revision tags: llvmorg-7.1.0, llvmorg-7.1.0-rc1, llvmorg-8.0.0-rc2
# 3d6a49b0 04-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix not calling observer when legalizing bitcount ops

This was hiding bugs from never legalizing the source type.

llvm-svn: 353102


# b3e86709 04-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Improve gtest usage

Don't unnecessarily use ASSERT_*, and print the MachineFunction
on failure.

llvm-svn: 353072


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