#
274de447 |
| 02-Nov-2020 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Save target state before running the benchmark.
Some benchmarked instructions might set target state. Preserve this state. See PR26418.
Differential Revision: https://reviews.llvm.o
[llvm-exegesis] Save target state before running the benchmark.
Some benchmarked instructions might set target state. Preserve this state. See PR26418.
Differential Revision: https://reviews.llvm.org/D90592
show more ...
|
Revision tags: llvmorg-11.0.0, llvmorg-11.0.0-rc6 |
|
#
cb3fd715 |
| 01-Oct-2020 |
Vy Nguyen <vyng@google.com> |
Reland rG4fcd1a8e6528:[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking.
This is mostly for the benefit of the LBR latency mode. Right now, it perform
Reland rG4fcd1a8e6528:[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking.
This is mostly for the benefit of the LBR latency mode. Right now, it performs no checking. If this is run on non-supported hardware, it will produce all zeroes for latency.
Differential Revision: https://reviews.llvm.org/D85254
New change: Updated lit.local.cfg to use pass the right argument to llvm-exegesis to actually request the LBR mode.
Differential Revision: https://reviews.llvm.org/D88670
show more ...
|
#
2c9dc7bb |
| 01-Oct-2020 |
Michael Liao <michael.hliao@gmail.com> |
Revert "[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking."
This reverts commit 4fcd1a8e6528ca42fe656f2745e15d2b7f5de495 as `llvm/test/tools/llvm-exege
Revert "[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking."
This reverts commit 4fcd1a8e6528ca42fe656f2745e15d2b7f5de495 as `llvm/test/tools/llvm-exegesis/X86/lbr/mov-add.s` failed on hosts without LBR supported if the build has LIBPFM enabled. On that host, `perf_event_open` fails with `EOPNOTSUPP` on LBR config. That change's basic assumption
> If this is run on a non-supported hardware, it will produce all zeroes for latency.
could not stand as `perf_event_open` system call will fail if the underlying hardware really don't have LBR supported.
show more ...
|
Revision tags: llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3, llvmorg-11.0.0-rc2 |
|
#
4fcd1a8e |
| 04-Aug-2020 |
Vy Nguyen <vyng@google.com> |
[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking.
This is mostly for the benefit of the LBR latency mode. Right now, it performs no checking. If this
[llvm-exegesis] Add option to check the hardware support for a given feature before benchmarking.
This is mostly for the benefit of the LBR latency mode. Right now, it performs no checking. If this is run on non-supported hardware, it will produce all zeroes for latency.
Differential Revision: https://reviews.llvm.org/D85254
show more ...
|
Revision tags: llvmorg-11.0.0-rc1, llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2 |
|
#
e086a39c |
| 25-Jun-2020 |
Vy Nguyen <vyng@google.com> |
[llvm-exegesis] Let Counter returns up to 16 entries
LBR contains (up to) 16 entries for last x branches and the X86LBRCounter (from D77422) should be able to return all those. Currently, it
[llvm-exegesis] Let Counter returns up to 16 entries
LBR contains (up to) 16 entries for last x branches and the X86LBRCounter (from D77422) should be able to return all those. Currently, it just returns the latest entry, which could lead to mis-leading measurements. This patch aslo changes the LatencyBenchmarkRunner to accommodate multi-value readings.
https://reviews.llvm.org/D81050
show more ...
|
#
5b8c1ed2 |
| 02-Jun-2020 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Fix D80610.
Summary: Using a .data() member on a StringRef was discarding the StringRef size, breaking llvm-exegesis on machines with counter sums (e.g. Zen2).
Reviewers: oontvoo
S
[llvm-exegesis] Fix D80610.
Summary: Using a .data() member on a StringRef was discarding the StringRef size, breaking llvm-exegesis on machines with counter sums (e.g. Zen2).
Reviewers: oontvoo
Subscribers: mstojanovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D80982
show more ...
|
#
cc8fafa2 |
| 27-May-2020 |
Vy Nguyen <vyng@google.com> |
[llvm-exegesis] Make a few counter methods virtual to allow targets to provide target-specific support. Misc: Also include errno in failure message.
Differential Revision: https://reviews.llvm.org/D
[llvm-exegesis] Make a few counter methods virtual to allow targets to provide target-specific support. Misc: Also include errno in failure message.
Differential Revision: https://reviews.llvm.org/D80610
show more ...
|
Revision tags: llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2 |
|
#
6030fe01 |
| 12-Feb-2020 |
Roman Lebedev <lebedev.ri@gmail.com> |
[llvm-exegesis] Exploring X86::OperandType::OPERAND_COND_CODE
Summary: Currently, we only have nice exploration for LEA instruction, while for the rest, we rely on `randomizeUnsetVariables()` to som
[llvm-exegesis] Exploring X86::OperandType::OPERAND_COND_CODE
Summary: Currently, we only have nice exploration for LEA instruction, while for the rest, we rely on `randomizeUnsetVariables()` to sometimes generate something interesting. While that works, it isn't very reliable in coverage :)
Here, i'm making an assumption that while we may want to explore multi-instruction configs, we are most interested in the characteristics of the main instruction we were asked about.
Which we can do, by taking the existing `randomizeMCOperand()`, and turning it on it's head - instead of relying on it to randomly fill one of the interesting values, let's pregenerate all the possible interesting values for the variable, and then generate as much `InstructionTemplate` combinations of these possible values for variables as needed/possible.
Of course, that requires invasive changes to no longer pass just the naked `Instruction`, but sometimes partially filled `InstructionTemplate`.
As it can be seen from the test, this allows us to explore `X86::OperandType::OPERAND_COND_CODE` for instructions that take such an operand. I'm hoping this will greatly simplify exploration.
Reviewers: courbet, gchatelet
Reviewed By: gchatelet
Subscribers: orodley, mgorny, sdardis, tschuett, jrtc27, atanasyan, mstojanovic, andreadb, RKSimon, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D74156
show more ...
|
#
4bd40f71 |
| 06-Feb-2020 |
Miloš Stojanović <Milos.Stojanovic@rt-rk.com> |
Recommit: "[llvm-exegesis] Improve error reporting in Target.cpp"
Summary: Commit 141915963b6ab36ee4e577d1b27673fa4d05b409 was reverted in abe01e17f648a97666d4fbed41f0861686a17972 because it broke b
Recommit: "[llvm-exegesis] Improve error reporting in Target.cpp"
Summary: Commit 141915963b6ab36ee4e577d1b27673fa4d05b409 was reverted in abe01e17f648a97666d4fbed41f0861686a17972 because it broke builds testing without libpfm. A preparatory commit <commit_sha1> was added to enable this recommit.
Original commit message:
Followup to D74085. Replace the use of `report_fatal_error()` with returning the error to `llvm-exegesis.cpp` and handling it there.
Differential Revision: https://reviews.llvm.org/D74113
show more ...
|
#
abe01e17 |
| 06-Feb-2020 |
Hans Wennborg <hans@chromium.org> |
Revert "[llvm-exegesis] Improve error reporting" and follow-up.
It broke e.g. all tests under tools/llvm-exegesis/X86/ when libpfm is not available, see comment on D74085.
This reverts commit b3576
Revert "[llvm-exegesis] Improve error reporting" and follow-up.
It broke e.g. all tests under tools/llvm-exegesis/X86/ when libpfm is not available, see comment on D74085.
This reverts commit b3576f60ebc8f660afad8120a72473be47517573 and 141915963b6ab36ee4e577d1b27673fa4d05b409.
show more ...
|
#
14191596 |
| 06-Feb-2020 |
Miloš Stojanović <Milos.Stojanovic@rt-rk.com> |
[llvm-exegesis] Improve error reporting in Target.cpp
Followup to D74085. Replace the use of `report_fatal_error()` with returning the error to `llvm-exegesis.cpp` and handling it there.
Differenti
[llvm-exegesis] Improve error reporting in Target.cpp
Followup to D74085. Replace the use of `report_fatal_error()` with returning the error to `llvm-exegesis.cpp` and handling it there.
Differential Revision: https://reviews.llvm.org/D74113
show more ...
|
Revision tags: llvmorg-10.0.0-rc1 |
|
#
04fd2041 |
| 22-Jan-2020 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Allow the randomizer to fail nicely...
Summary: ... instead of crashing. On typical exmaple is when there are no available registers.
Reviewers: gchatelet
Subscribers: tschuett, ms
[llvm-exegesis] Allow the randomizer to fail nicely...
Summary: ... instead of crashing. On typical exmaple is when there are no available registers.
Reviewers: gchatelet
Subscribers: tschuett, mstojanovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73196
show more ...
|
#
5be8b2ec |
| 22-Jan-2020 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Serial snippet: Restrict the set of back-to-back instructions
Summary: Right now when picking a back-to-back instruction at random, we might select instructions that we do not know h
[llvm-exegesis] Serial snippet: Restrict the set of back-to-back instructions
Summary: Right now when picking a back-to-back instruction at random, we might select instructions that we do not know how to handle. Add a ExegesisTarget hook to possibly filter instructions.
Reviewers: gchatelet
Subscribers: tschuett, mstojanovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73161
show more ...
|
#
24b7b99b |
| 17-Jan-2020 |
Miloš Stojanović <Milos.Stojanovic@rt-rk.com> |
[llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness of snippet generators and benchmark runners becau
[llvm-exegesis][NFC] Disassociate snippet generators from benchmark runners
The addition of `inverse_throughput` mode highlighted the disjointedness of snippet generators and benchmark runners because it used the `UopsSnippetGenerator` with the `LatencyBenchmarkRunner`. To keep the code consistent tie the snippet generators to parallelization/serialization rather than their benchmark runners.
Renaming `LatencySnippetGenerator` -> `SerialSnippetGenerator`. Renaming `UopsSnippetGenerator` -> `ParallelSnippetGenerator`.
Differential Revision: https://reviews.llvm.org/D72928
show more ...
|
Revision tags: llvmorg-11-init, llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1 |
|
#
50cdd56b |
| 09-Oct-2019 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis][NFC] Remove extra `llvm::` qualifications.
Summary: Second patch: in the lib.
Reviewers: gchatelet
Subscribers: nemanjai, tschuett, MaskRay, mgrang, jsji, llvm-commits
Tags: #llvm
[llvm-exegesis][NFC] Remove extra `llvm::` qualifications.
Summary: Second patch: in the lib.
Reviewers: gchatelet
Subscribers: nemanjai, tschuett, MaskRay, mgrang, jsji, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68692
llvm-svn: 374158
show more ...
|
#
2cd0f289 |
| 08-Oct-2019 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Add options to SnippetGenerator.
Summary: This adds a `-max-configs-per-opcode` option to limit the number of configs per opcode.
Reviewers: gchatelet
Subscribers: tschuett, llvm-c
[llvm-exegesis] Add options to SnippetGenerator.
Summary: This adds a `-max-configs-per-opcode` option to limit the number of configs per opcode.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68642
llvm-svn: 374054
show more ...
|
#
c0292744 |
| 03-Oct-2019 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis][NFC] Rename ExegesisTarget::decrementLoopCounterAndLoop()
Summary: To decrementLoopCounterAndJump, and explicitely take the jump target.
Reviewers: gchatelet
Subscribers: tschuett,
[llvm-exegesis][NFC] Rename ExegesisTarget::decrementLoopCounterAndLoop()
Summary: To decrementLoopCounterAndJump, and explicitely take the jump target.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68375
llvm-svn: 373571
show more ...
|
#
9431b72c |
| 27-Sep-2019 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Add loop mode for repeating the snippet.
Summary: Before this change the Executable function was made by duplicating the snippet. This change adds a --repetion-mode={loop|duplicate}
[llvm-exegesis] Add loop mode for repeating the snippet.
Summary: Before this change the Executable function was made by duplicating the snippet. This change adds a --repetion-mode={loop|duplicate} flag that allows choosing between this behaviour and wrapping the snippet instructions in a loop.
The new mode can help measurements when the snippet fits in the DSB by short-cirtcuiting decoding. The loop adds a dec + jmp to the measurements, but since these are not part of the critical path, they execute in parallel with the measured code and do not impact measurements in practice.
Overview of the change: - New SnippetRepetitor abstraction that handles repeating the snippet. The assembler delegates repeating the instructions to this class. - ExegesisTarget learns how to decrement loop counter and jump. - Some refactoring of the assembler into FunctionFiller/BasicBlockFiller.
Reviewers: gchatelet
Subscribers: mgorny, tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68125
llvm-svn: 373083
show more ...
|
Revision tags: llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init, llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3, llvmorg-8.0.1-rc2, llvmorg-8.0.1-rc1 |
|
#
404bdb1c |
| 06-Apr-2019 |
Roman Lebedev <lebedev.ri@gmail.com> |
[llvm-exegesis][X86] Handle CMOVcc/SETcc OPERAND_COND_CODE OperandType
Summary: D60041 / D60138 refactoring changed how CMOV/SETcc opcodes are handled. concode is now an immediate, with it's own ope
[llvm-exegesis][X86] Handle CMOVcc/SETcc OPERAND_COND_CODE OperandType
Summary: D60041 / D60138 refactoring changed how CMOV/SETcc opcodes are handled. concode is now an immediate, with it's own operand type.
This at least allows to not crash on the opcode. However, this still won't generate all the snippets with all the condcode enumerators. D60066 does that.
Reviewers: courbet, gchatelet
Reviewed By: gchatelet
Subscribers: tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D60057
llvm-svn: 357841
show more ...
|
#
52da938c |
| 26-Mar-2019 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Allow the target to disable the selection of some registers.
Summary: This prevents "Cannot encode high byte register in REX-prefixed instruction" from happening on instructions that
[llvm-exegesis] Allow the target to disable the selection of some registers.
Summary: This prevents "Cannot encode high byte register in REX-prefixed instruction" from happening on instructions that require REX encoding when AH & co get selected. On the down side, these 4 registers can no longer be selected automatically, but this avoids having to expose all the X86 encoding complexity.
Reviewers: gchatelet
Subscribers: tschuett, jdoerfert, llvm-commits, bdb
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D59821
llvm-svn: 357003
show more ...
|
Revision tags: llvmorg-8.0.0, llvmorg-8.0.0-rc5, llvmorg-8.0.0-rc4, llvmorg-8.0.0-rc3, llvmorg-7.1.0, llvmorg-7.1.0-rc1, llvmorg-8.0.0-rc2 |
|
#
362653f7 |
| 30-Jan-2019 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Add throughput mode.
Summary: This just uses the latency benchmark runner on the parallel uops snippet generator.
Fixes PR37698.
Reviewers: gchatelet
Subscribers: tschuett, RKSimo
[llvm-exegesis] Add throughput mode.
Summary: This just uses the latency benchmark runner on the parallel uops snippet generator.
Fixes PR37698.
Reviewers: gchatelet
Subscribers: tschuett, RKSimon, llvm-commits
Differential Revision: https://reviews.llvm.org/D57000
llvm-svn: 352632
show more ...
|
Revision tags: llvmorg-8.0.0-rc1 |
|
#
2946cd70 |
| 19-Jan-2019 |
Chandler Carruth <chandlerc@gmail.com> |
Update the file headers across all of the LLVM projects in the monorepo to reflect the new license.
We understand that people may be surprised that we're moving the header entirely to discuss the ne
Update the file headers across all of the LLVM projects in the monorepo to reflect the new license.
We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach.
Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository.
llvm-svn: 351636
show more ...
|
Revision tags: llvmorg-7.0.1, llvmorg-7.0.1-rc3 |
|
#
0d79aaf1 |
| 08-Nov-2018 |
Clement Courbet <courbet@google.com> |
Revert "[llvm-exegesis] Add a snippet generator to generate snippets to compute ROB sizes."
This reverts accidental commit rL346394.
llvm-svn: 346398
|
#
c0950ae9 |
| 08-Nov-2018 |
Clement Courbet <courbet@google.com> |
[llvm-exegesis] Add a snippet generator to generate snippets to compute ROB sizes.
llvm-svn: 346394
|
Revision tags: llvmorg-7.0.1-rc2, llvmorg-7.0.1-rc1 |
|
#
2a9c7280 |
| 25-Oct-2018 |
Simon Pilgrim <llvm-dev@redking.me.uk> |
Fix MSVC llvm-exegesis build. NFCI.
MSVC is a bit funny about is_pod.....
llvm-svn: 345252
|