Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5, llvmorg-19.1.4 |
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f71cb9db |
| 14-Nov-2024 |
Kazu Hirata <kazu@google.com> |
[PowerPC] Remove unused includes (NFC) (#116163)
Identified with misc-include-cleaner.
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Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2, llvmorg-19.1.0-rc1, llvmorg-20-init |
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2d209d96 |
| 27-Jun-2024 |
Nikita Popov <npopov@redhat.com> |
[IR] Add getDataLayout() helpers to BasicBlock and Instruction (#96902)
This is a helper to avoid writing `getModule()->getDataLayout()`. I
regularly try to use this method only to remember it does
[IR] Add getDataLayout() helpers to BasicBlock and Instruction (#96902)
This is a helper to avoid writing `getModule()->getDataLayout()`. I
regularly try to use this method only to remember it doesn't exist...
`getModule()->getDataLayout()` is also a common (the most common?)
reason why code has to include the Module.h header.
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Revision tags: llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2 |
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b9d83eff |
| 19-Mar-2024 |
Jeremy Morse <jeremy.morse@sony.com> |
[NFC][RemoveDIs] Use iterators for insertion at various call-sites (#84736)
These are the last remaining "trivial" changes to passes that use
Instruction pointers for insertion. All of this should
[NFC][RemoveDIs] Use iterators for insertion at various call-sites (#84736)
These are the last remaining "trivial" changes to passes that use
Instruction pointers for insertion. All of this should be NFC, it's just
changing the spelling of how we identify a position.
In one or two locations, I'm also switching uses of getNextNode etc to
using std::next with iterators. This too should be NFC.
---------
Merged by: Stephen Tozer <stephen.tozer@sony.com>
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Revision tags: llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0 |
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6942c64e |
| 11-Sep-2023 |
Jeremy Morse <jeremy.morse@sony.com> |
[NFC][RemoveDIs] Prefer iterator-insertion over instructions
Continuing the patch series to get rid of debug intrinsics [0], instruction insertion needs to be done with iterators rather than instruc
[NFC][RemoveDIs] Prefer iterator-insertion over instructions
Continuing the patch series to get rid of debug intrinsics [0], instruction insertion needs to be done with iterators rather than instruction pointers, so that we can communicate information in the iterator class. This patch adds an iterator-taking insertBefore method and converts various call sites to take iterators. These are all sites where such debug-info needs to be preserved so that a stage2 clang can be built identically; it's likely that many more will need to be changed in the future.
At this stage, this is just changing the spelling of a few operations, which will eventually become signifiant once the debug-info bearing iterator is used.
[0] https://discourse.llvm.org/t/rfc-instruction-api-changes-needed-to-eliminate-debug-intrinsics-from-ir/68939
Differential Revision: https://reviews.llvm.org/D152537
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Revision tags: llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3 |
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e53b28c8 |
| 08-Aug-2023 |
Bjorn Pettersson <bjorn.a.pettersson@ericsson.com> |
[llvm] Drop some bitcasts and references related to typed pointers
Differential Revision: https://reviews.llvm.org/D157551
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Revision tags: llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0 |
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7ada7bbe |
| 15-Mar-2023 |
Kazu Hirata <kazu@google.com> |
[Target] Use *{Set,Map}::contains (NFC)
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Revision tags: llvmorg-16.0.0-rc4 |
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5541f473 |
| 08-Mar-2023 |
esmeyi <esme.yi@ibm.com> |
[PowerPC] Check if the latch block is in the value list for the PHI before get the incoming value.
Summary: Fixes #60990. There is a crash reported during Running pass 'Prepare loop for ppc preferre
[PowerPC] Check if the latch block is in the value list for the PHI before get the incoming value.
Summary: Fixes #60990. There is a crash reported during Running pass 'Prepare loop for ppc preferred instruction forms'. The crash occurs in 32bit PowerPC.
Reviewed By: shchenz
Differential Revision: https://reviews.llvm.org/D145350
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Revision tags: llvmorg-16.0.0-rc3, llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2 |
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90f7f24b |
| 28-Sep-2022 |
Nico Weber <thakis@chromium.org> |
try to fix build yet more after 16544cbe64b8
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Revision tags: llvmorg-15.0.1, llvmorg-15.0.0 |
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2833760c |
| 29-Aug-2022 |
Kazu Hirata <kazu@google.com> |
[Target] Qualify auto in range-based for loops (NFC)
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Revision tags: llvmorg-15.0.0-rc3 |
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8e494b85 |
| 21-Aug-2022 |
Kazu Hirata <kazu@google.com> |
Use llvm::drop_begin (NFC)
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Revision tags: llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init |
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dcf4b733 |
| 13-Jul-2022 |
Nikita Popov <npopov@redhat.com> |
[SCEVExpander] Make CanonicalMode handing in isSafeToExpand() more robust (PR50506)
isSafeToExpand() for addrecs depends on whether the SCEVExpander will be used in CanonicalMode. At least one calle
[SCEVExpander] Make CanonicalMode handing in isSafeToExpand() more robust (PR50506)
isSafeToExpand() for addrecs depends on whether the SCEVExpander will be used in CanonicalMode. At least one caller currently gets this wrong, resulting in PR50506.
Fix this by a) making the CanonicalMode argument on the freestanding functions required and b) adding member functions on SCEVExpander that automatically take the SCEVExpander mode into account. We can use the latter variant nearly everywhere, and thus make sure that there is no chance of CanonicalMode mismatch.
Fixes https://github.com/llvm/llvm-project/issues/50506.
Differential Revision: https://reviews.llvm.org/D129630
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Revision tags: llvmorg-14.0.6, llvmorg-14.0.5 |
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d86a206f |
| 05-Jun-2022 |
Fangrui Song <i@maskray.me> |
Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options
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Revision tags: llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1, llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2 |
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9db0e216 |
| 22-Dec-2021 |
Kazu Hirata <kazu@google.com> |
[llvm] Use depth_first (NFC)
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Revision tags: llvmorg-13.0.1-rc1 |
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eec9ca62 |
| 09-Nov-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] guard update form prepare with non-const increment with option
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D113471
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f6db18fd |
| 04-Nov-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC][NFC] make option ppc-formprep-max-vars can be set more than one time.
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eeed1545 |
| 01-Nov-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] turn off chain commoning by default.
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7591d210 |
| 29-Oct-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] fix a miscompile for Solaris build
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631f44f3 |
| 26-Oct-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] use right extend type for SCEV
Fix an issue caused by D108750
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D112502
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80e6aff6 |
| 25-Oct-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] common chains to reuse offsets to reduce register pressure.
Add a new preparation pattern in PPCLoopInstFormPrep pass to reduce register pressure.
Reviewed By: jsji
Differential Revision
[PowerPC] common chains to reuse offsets to reduce register pressure.
Add a new preparation pattern in PPCLoopInstFormPrep pass to reduce register pressure.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D108750
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86a5c326 |
| 22-Oct-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] iterate on the SmallSet directly; NFC
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13755436 |
| 22-Oct-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] return early if there is no preparing candidate in the loop; NFC
This is to improve compiling time.
Differential Revision: https://reviews.llvm.org/D112196
Reviewed By: jsji
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Revision tags: llvmorg-13.0.0, llvmorg-13.0.0-rc4 |
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1bf05fbc |
| 23-Sep-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] refactor rewriteLoadStores for reusing; nfc
This is split from https://reviews.llvm.org/D108750. Refactor rewriteLoadStores() so that we can reuse the outlined functions.
Reviewed By: jsj
[PowerPC] refactor rewriteLoadStores for reusing; nfc
This is split from https://reviews.llvm.org/D108750. Refactor rewriteLoadStores() so that we can reuse the outlined functions.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D110314
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ffa9fa9e |
| 22-Sep-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] prepare for udpate form with non-const increment.
This is a follow-up of D105872. Now we are able to prepare for update form with non-const increment.
Reviewed By: jsji
Differential Revi
[PowerPC] prepare for udpate form with non-const increment.
This is a follow-up of D105872. Now we are able to prepare for update form with non-const increment.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D106032
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946e69d2 |
| 14-Sep-2021 |
Chen Zheng <czhengsz@cn.ibm.com> |
[PowerPC] prepare more loop load/store instructions
PPCLoopInstrFormPrep pass now can prepare for load store instructions in a loop whose increment is not a constant integer.
Reviewed By: jsji
Dif
[PowerPC] prepare more loop load/store instructions
PPCLoopInstrFormPrep pass now can prepare for load store instructions in a loop whose increment is not a constant integer.
Reviewed By: jsji
Differential Revision: https://reviews.llvm.org/D105872
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Revision tags: llvmorg-13.0.0-rc3 |
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8671191d |
| 02-Sep-2021 |
Jinsong Ji <jji@us.ibm.com> |
[NFC][PowerPC] Small code refactor in LoopInstrFormPrep
Avoid some duplicate code.
Reviewed By: #powerpc, shchenz
Differential Revision: https://reviews.llvm.org/D109083
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