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425071ef |
| 19-Sep-2017 |
Tony Jiang <jtony@ca.ibm.com> |
[Power9] Add missing Power9 instructions.
The following 8 instructions are implemented in this patch. addpcis(subpcis, lnia), darn, maddhd, maddhdu, maddld, setb
llvm-svn: 313636
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Revision tags: llvmorg-5.0.0, llvmorg-5.0.0-rc5, llvmorg-5.0.0-rc4, llvmorg-5.0.0-rc3, llvmorg-5.0.0-rc2, llvmorg-5.0.0-rc1, llvmorg-4.0.1, llvmorg-4.0.1-rc3, llvmorg-4.0.1-rc2, llvmorg-4.0.1-rc1, llvmorg-4.0.0, llvmorg-4.0.0-rc4, llvmorg-4.0.0-rc3, llvmorg-4.0.0-rc2, llvmorg-4.0.0-rc1, llvmorg-3.9.1, llvmorg-3.9.1-rc3 |
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#
d6642c11 |
| 05-Dec-2016 |
Nirav Dave <niravd@google.com> |
[PPC] Slightly Improve Assembly Parsing errors and add EOL comment parsing tests.
NFC intended.
llvm-svn: 288667
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Revision tags: llvmorg-3.9.1-rc2, llvmorg-3.9.1-rc1 |
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#
0da86301 |
| 10-Oct-2016 |
Peter Collingbourne <peter@pcc.me.uk> |
Revert r283690, "MC: Remove unused entities."
llvm-svn: 283814
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#
f42454b9 |
| 09-Oct-2016 |
Mehdi Amini <mehdi.amini@apple.com> |
Move the global variables representing each Target behind accessor function
This avoids "static initialization order fiasco"
Differential Revision: https://reviews.llvm.org/D25412
llvm-svn: 283702
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#
cc723ccc |
| 09-Oct-2016 |
Peter Collingbourne <peter@pcc.me.uk> |
MC: Remove unused entities.
llvm-svn: 283691
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#
11049f8f |
| 04-Oct-2016 |
Nemanja Ivanovic <nemanja.i.ibm@gmail.com> |
[Power9] Part-word VSX integer scalar loads/stores and sign extend instructions
This patch corresponds to review: https://reviews.llvm.org/D23155
This patch removes the VSHRC register class (based
[Power9] Part-word VSX integer scalar loads/stores and sign extend instructions
This patch corresponds to review: https://reviews.llvm.org/D23155
This patch removes the VSHRC register class (based on D20310) and adds exploitation of the Power9 sub-word integer loads into VSX registers as well as vector sign extensions. The new instructions are useful for a few purposes:
Int to Fp conversions of 1 or 2-byte values loaded from memory Building vectors of 1 or 2-byte integers with values loaded from memory Storing individual 1 or 2-byte elements from integer vectors
This patch implements all of those uses.
llvm-svn: 283190
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#
522e4d9d |
| 03-Sep-2016 |
Hal Finkel <hfinkel@anl.gov> |
[PowerPC] Support asm parsing for bc[l][a][+-] mnemonics
PowerPC assembly code in the wild, so it seems, has things like this:
bc+ 12, 28, .L9
This is a bit odd because the '+' here becomes
[PowerPC] Support asm parsing for bc[l][a][+-] mnemonics
PowerPC assembly code in the wild, so it seems, has things like this:
bc+ 12, 28, .L9
This is a bit odd because the '+' here becomes part of the BO field, and the BO field is otherwise the first operand. Nevertheless, the ISA specification does clearly say that the +- hint syntax applies to all conditional-branch mnemonics (that test either CTR or a condition register, although not the forms which check both), both basic and extended, so this is supposed to be valid.
This introduces some asm-parser-only definitions which take only the upper three bits from the specified BO value, and the lower two bits are implied by the +- suffix (via some associated aliases).
Fixes PR23646.
llvm-svn: 280571
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#
277736ee |
| 02-Sep-2016 |
Hal Finkel <hfinkel@anl.gov> |
[PowerPC] Add support for the extended dcbf form and mnemonics
dcbf has an optional hint-like field, add support for the extended form and the associated mnemonics (dcbfl and dcbflp).
Partially fix
[PowerPC] Add support for the extended dcbf form and mnemonics
dcbf has an optional hint-like field, add support for the extended form and the associated mnemonics (dcbfl and dcbflp).
Partially fixes PR24796.
llvm-svn: 280559
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Revision tags: llvmorg-3.9.0, llvmorg-3.9.0-rc3, llvmorg-3.9.0-rc2 |
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#
b03fd12c |
| 17-Aug-2016 |
Justin Bogner <mail@justinbogner.com> |
Replace "fallthrough" comments with LLVM_FALLTHROUGH
This is a mechanical change of comments in switches like fallthrough, fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead.
llvm
Replace "fallthrough" comments with LLVM_FALLTHROUGH
This is a mechanical change of comments in switches like fallthrough, fall-through, or fall-thru to use the LLVM_FALLTHROUGH macro instead.
llvm-svn: 278902
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Revision tags: llvmorg-3.9.0-rc1 |
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#
fd91041c |
| 17-Jun-2016 |
Nirav Dave <niravd@google.com> |
Refactor and cleanup Assembly Parsing / Lexing
Recommiting after fixing non-atomic insert to front of SmallVector in MCAsmLexer.h
Add explicit Comment Token in Assembly Lexing for future support fo
Refactor and cleanup Assembly Parsing / Lexing
Recommiting after fixing non-atomic insert to front of SmallVector in MCAsmLexer.h
Add explicit Comment Token in Assembly Lexing for future support for outputting explicit comments from inline assembly. As part of this, CPPHash Directives are now explicitly distinguished from Hash line comments in Lexer.
Line comments are recorded as EndOfStatement tokens, not Comment tokens to simplify compatibility with current TargetParsers. This slightly complicates comment output.
This remove all lexing tasks out of the parser, does minor cleanup to remove extraneous newlines Asm Output, and some improvements white space handling.
Reviewers: rtrieu, dwmw2, rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D20009
llvm-svn: 273007
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#
280ecf6f |
| 16-Jun-2016 |
Nirav Dave <niravd@google.com> |
Revert "Refactor and cleanup Assembly Parsing / Lexing"
Reverting for unexpected crashes on various platforms.
This reverts commit r272953.
llvm-svn: 272957
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#
c19c3260 |
| 16-Jun-2016 |
Nirav Dave <niravd@google.com> |
Refactor and cleanup Assembly Parsing / Lexing
Add explicit Comment Token in Assembly Lexing for future support for outputting explicit comments from inline assembly. As part of this, CPPHash Direct
Refactor and cleanup Assembly Parsing / Lexing
Add explicit Comment Token in Assembly Lexing for future support for outputting explicit comments from inline assembly. As part of this, CPPHash Directives are now explicitly distinguished from Hash line comments in Lexer.
Line comments are recorded as EndOfStatement tokens, not Comment tokens to simplify compatibility with current TargetParsers. This slightly complicates comment output.
This remove all lexing tasks out of the parser, does minor cleanup to remove extraneous newlines Asm Output, and some improvements white space handling.
Reviewers: rtrieu, dwmw2, rnk
Subscribers: llvm-commits
Differential Revision: http://reviews.llvm.org/D20009
llvm-svn: 272953
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#
87590fae |
| 16-Jun-2016 |
Eric Christopher <echristo@gmail.com> |
Tidy the asm parser: 80-col, whitespace.
llvm-svn: 272861
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Revision tags: llvmorg-3.8.1, llvmorg-3.8.1-rc1 |
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#
4fed928f |
| 27-May-2016 |
Benjamin Kramer <benny.kra@googlemail.com> |
Avoid some copies by using const references.
clang-tidy's performance-unnecessary-copy-initialization with some manual fixes. No functional changes intended.
llvm-svn: 270988
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#
7a1a9e01 |
| 28-Apr-2016 |
Kit Barton <kbarton@ca.ibm.com> |
This reverts commit r265505.
Revert "[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance". This patch has caused a functional regre
This reverts commit r265505.
Revert "[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance". This patch has caused a functional regression in SPEC2k6 namd, and a performance regression in mesa-pipe.
llvm-svn: 267927
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#
b550cb17 |
| 18-Apr-2016 |
Mehdi Amini <mehdi.amini@apple.com> |
[NFC] Header cleanup
Removed some unused headers, replaced some headers with forward class declarations.
Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedM
[NFC] Header cleanup
Removed some unused headers, replaced some headers with forward class declarations.
Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap'
Patch by Eugene Kosov <claprix@yandex.ru>
Differential Revision: http://reviews.llvm.org/D19219
From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
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#
024a623c |
| 06-Apr-2016 |
Chuang-Yu Cheng <cycheng@multicorewareinc.com> |
[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance
This patch implement the following instructions: - addpcis subpcis - maddhd mad
[Power9] Implement add-pc, multiply-add, modulo, extend-sign-shift, random number, set bool, and dfp test significance
This patch implement the following instructions: - addpcis subpcis - maddhd maddhdu maddld - modsw moduw modsd modud - darn - extswsli extswsli. - setb - dtstsfi dtstsfiq
Total 15 instructions
Reviewers: nemanjai hfinkel tjablin amehsan kbarton
http://reviews.llvm.org/D17885
llvm-svn: 265505
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#
eaf4b3d7 |
| 06-Apr-2016 |
Chuang-Yu Cheng <cycheng@multicorewareinc.com> |
[Power9] Implement copy-paste, msgsync, slb, and stop instructions
This patch implements the following BookII and Book III instructions: - copy copy_first cp_abort paste paste. paste_last - msgsync
[Power9] Implement copy-paste, msgsync, slb, and stop instructions
This patch implements the following BookII and Book III instructions: - copy copy_first cp_abort paste paste. paste_last - msgsync - slbieg slbsync - stop
Total 10 instructions
Reviewers: nemanjai hfinkel tjablin amehsan kbarton llvm-svn: 265504
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#
80722719 |
| 28-Mar-2016 |
Chuang-Yu Cheng <cycheng@multicorewareinc.com> |
[Power9] Implement new vsx instructions: insert, extract, test data class, min/max, reverse, permute, splat
This change implements the following vsx instructions:
- Scalar Insert/Extract xsiexp
[Power9] Implement new vsx instructions: insert, extract, test data class, min/max, reverse, permute, splat
This change implements the following vsx instructions:
- Scalar Insert/Extract xsiexpdp xsiexpqp xsxexpdp xsxsigdp xsxexpqp xsxsigqp
- Vector Insert/Extract xviexpdp xviexpsp xvxexpdp xvxexpsp xvxsigdp xvxsigsp xxextractuw xxinsertw
- Scalar/Vector Test Data Class xststdcdp xststdcsp xststdcqp xvtstdcdp xvtstdcsp
- Maximum/Minimum xsmaxcdp xsmaxjdp xsmincdp xsminjdp
- Vector Byte-Reverse/Permute/Splat xxbrd xxbrh xxbrq xxbrw xxperm xxpermr xxspltib
30 instructions
Thanks Nemanja for invaluable discussion! Thanks Kit's great help! Reviewers: hal, nemanja, kbarton, tjablin, amehsan
http://reviews.llvm.org/D16842
llvm-svn: 264567
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#
ba532dc8 |
| 08-Mar-2016 |
Kit Barton <kbarton@ca.ibm.com> |
[Power9] Implement new vsx instructions: load, store instructions for vector and scalar
We follow the comments mentioned in http://reviews.llvm.org/D16842#344378 to implement this new patch.
This p
[Power9] Implement new vsx instructions: load, store instructions for vector and scalar
We follow the comments mentioned in http://reviews.llvm.org/D16842#344378 to implement this new patch.
This patch implements the following vsx instructions:
Vector load/store: lxv lxvx lxvb16x lxvl lxvll lxvh8x lxvwsx stxv stxvb16x stxvh8x stxvl stxvll stxvx Scalar load/store: lxsd lxssp lxsibzx lxsihzx stxsd stxssp stxsibx stxsihx 21 instructions
Phabricator: http://reviews.llvm.org/D16919 llvm-svn: 262906
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#
c2a2830e |
| 08-Mar-2016 |
Richard Smith <richard-llvm@metafoo.co.uk> |
A couple more UB fixes for C++14 sized deallocation.
llvm-svn: 262891
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Revision tags: llvmorg-3.8.0, llvmorg-3.8.0-rc3, llvmorg-3.8.0-rc2 |
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#
b3e8a6d2 |
| 27-Jan-2016 |
Benjamin Kramer <benny.kra@googlemail.com> |
Move MCTargetAsmParser.h to llvm/MC/MCParser where it belongs.
llvm-svn: 258917
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Revision tags: llvmorg-3.8.0-rc1, llvmorg-3.7.1, llvmorg-3.7.1-rc2, llvmorg-3.7.1-rc1 |
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#
b11ef089 |
| 14-Nov-2015 |
Akira Hatanaka <ahatanaka@apple.com> |
Reduce the size of MCRelaxableFragment.
MCRelaxableFragment previously kept a copy of MCSubtargetInfo and MCInst to enable re-encoding the MCInst later during relaxation. A copy of MCSubtargetInfo (
Reduce the size of MCRelaxableFragment.
MCRelaxableFragment previously kept a copy of MCSubtargetInfo and MCInst to enable re-encoding the MCInst later during relaxation. A copy of MCSubtargetInfo (instead of a reference or pointer) was needed because the feature bits could be modified by the parser.
This commit replaces the MCSubtargetInfo copy in MCRelaxableFragment with a constant reference to MCSubtargetInfo. The copies of MCSubtargetInfo are kept in MCContext, and the target parsers are now responsible for asking MCContext to provide a copy whenever the feature bits of MCSubtargetInfo have to be toggled. With this patch, I saw a 4% reduction in peak memory usage when I compiled verify-uselistorder.lto.bc using llc.
rdar://problem/21736951
Differential Revision: http://reviews.llvm.org/D14346
llvm-svn: 253127
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#
bd9fc284 |
| 14-Nov-2015 |
Akira Hatanaka <ahatanaka@apple.com> |
[MCTargetAsmParser] Move the member varialbes that reference MCSubtargetInfo in the subclasses into MCTargetAsmParser and define a member function getSTI.
This is done in preparation for making chan
[MCTargetAsmParser] Move the member varialbes that reference MCSubtargetInfo in the subclasses into MCTargetAsmParser and define a member function getSTI.
This is done in preparation for making changes to shrink the size of MCRelaxableFragment. (see http://reviews.llvm.org/D14346).
llvm-svn: 253124
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#
a375b261 |
| 26-Oct-2015 |
David Majnemer <david.majnemer@gmail.com> |
[MC] Don't crash when .word is given bogus values
We didn't validate that the .word directive was given a sane value, leading to crashes when we attempt to write out the object file.
Instead, perfo
[MC] Don't crash when .word is given bogus values
We didn't validate that the .word directive was given a sane value, leading to crashes when we attempt to write out the object file.
Instead, perform some validation and issue a diagnostic pointing at the start of the diagnostic.
llvm-svn: 251270
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