[mips] Rename function findDelayInstr to searchBackward.

llvm-svn: 176317

[mips] Define class MemDefsUses.

This class tracks dependence between memory instructions using underlying
objects of memory operands.

llvm-svn: 176313

[mips] Use class RegDefsUses to track register defs and uses.

No functionality change.

llvm-svn: 176070

[mips] Disallow moving load/store instructions past volatile instructions.

Unfortunately, I wasn't able to create a test case that demonstrates the
problem I was trying to fix with this patch.

llvm

[mips] Disallow moving load/store instructions past volatile instructions.

Unfortunately, I wasn't able to create a test case that demonstrates the
problem I was trying to fix with this patch.

llvm-svn: 175226

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[mips] Replace usage of SmallSet with BitVector, which is used to keep track of
defined and used registers. Also add a few helper functions to simplify the
code.

llvm-svn: 175224

[mips] Fix comments and coding style violations. Declare functions to be const.

llvm-svn: 175222

[mips] Simplify code in function Filler::findDelayInstr.

1. Define and use function terminateSearch.
2. Use MachineBasicBlock::iterator instead of MachineBasicBlock::instr_iterator.
3. Delete the li

[mips] Simplify code in function Filler::findDelayInstr.

1. Define and use function terminateSearch.
2. Use MachineBasicBlock::iterator instead of MachineBasicBlock::instr_iterator.
3. Delete the line which checks whether an instruction is a pseudo.

llvm-svn: 175219

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[mips] Make Filler a class and reduce indentation.

llvm-svn: 174666

Use the new MIBundleBuilder class in the Mips target.

This is the preferred way of creating bundled machine instructions.

llvm-svn: 169585

Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module

Use the new script to sort the includes of every file under lib.

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131

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[mips] Fix delay slot filler so that instructions with register operand $1 are
allowed in branch delay slot.

llvm-svn: 168131

Disable Mips' delay slot filler when optimization level is O0.

llvm-svn: 162589

Add option disable-mips-delay-filler. Turn on mips' delay slot filler by
default.

Patch by Carl Norum.

llvm-svn: 162339

Fix coding style violations. Remove white spaces and tabs.

llvm-svn: 158471

Bundle jump/branch instructions with the instructions in the delay slot in
delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen.

This change, along with the fix in r158154, enable

Bundle jump/branch instructions with the instructions in the delay slot in
delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen.

This change, along with the fix in r158154, enables machine verification
to be run after delay slot filling.

llvm-svn: 158426

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Switch some getAliasSet clients to MCRegAliasIterator.

MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.

llvm-svn: 157837

Add a command line option to skip the delay slot filler pass entirely for Mips.

The purpose of this option is to silence error messages issued by machine
verifier passes and enable them to run to th

Add a command line option to skip the delay slot filler pass entirely for Mips.

The purpose of this option is to silence error messages issued by machine
verifier passes and enable them to run to the end. If this option is not
provided, -verify-machineinstrs complains when it discovers there is a
non-terminator instruction (an instruction that is in a delay slot) after the
first terminator in a basic block.

llvm-svn: 156790

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Use uint16_t to store register overlaps to reduce static data.

llvm-svn: 152001

remove blanks, and some code format

llvm-svn: 151625

remove Emacs-tag form .cpp files in Mips Backend, and fix some typo.

llvm-svn: 150805

add Emacs tag and fix some comment error in file headers

llvm-svn: 150775

Tidy up. Simplify logic. No functional change intended.

llvm-svn: 146896

Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayL

Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026

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Fix assertion string.

llvm-svn: 141197

Make sure candidate for delay slot filler is not a return instruction.

llvm-svn: 141196