#
ece40ca4 |
| 29-May-2015 |
Rafael Espindola <rafael.espindola@gmail.com> |
Pass a MCSymbol to needsRelocateWithSymbol.
llvm-svn: 238589
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Revision tags: llvmorg-3.6.1, llvmorg-3.6.1-rc1 |
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#
5560a4cf |
| 14-Apr-2015 |
Rafael Espindola <rafael.espindola@gmail.com> |
Use raw_pwrite_stream in the object writer/streamer.
The ELF object writer will take advantage of that in the next commit.
llvm-svn: 234950
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#
f817c1cb |
| 11-Apr-2015 |
Alexander Kornienko <alexfh@google.com> |
Use 'override/final' instead of 'virtual' for overridden methods
The patch is generated using clang-tidy misc-use-override check.
This command was used:
tools/clang/tools/extra/clang-tidy/tool/r
Use 'override/final' instead of 'virtual' for overridden methods
The patch is generated using clang-tidy misc-use-override check.
This command was used:
tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py \ -checks='-*,misc-use-override' -header-filter='llvm|clang' \ -j=32 -fix -format
http://reviews.llvm.org/D8925
llvm-svn: 234679
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#
42335572 |
| 06-Apr-2015 |
Tim Northover <tnorthover@apple.com> |
ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.
After recognising that a certain narrow instruction might need a relocation to be represented, we used to unconditionally relax it to
ARM: do not relax Thumb1 -> Thumb2 if only Thumb1 is available.
After recognising that a certain narrow instruction might need a relocation to be represented, we used to unconditionally relax it to a Thumb2 instruction to permit this. Unfortunately, some CPUs (e.g. v6m) don't even have most Thumb2 instructions, so we end up emitting a completely invalid instruction.
Theoretically, ELF does have relocations for these situations; but they are fairly unusable with such short ranges and the ABI document even says they're documented "for completeness". So an error is probably better there too.
rdar://20391953
llvm-svn: 234195
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Revision tags: llvmorg-3.5.2, llvmorg-3.5.2-rc1, llvmorg-3.6.0, llvmorg-3.6.0-rc4, llvmorg-3.6.0-rc3, llvmorg-3.6.0-rc2, llvmorg-3.6.0-rc1 |
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#
fe781977 |
| 11-Jan-2015 |
Saleem Abdulrasool <compnerd@compnerd.org> |
ARM: add support for segment base relocations (SBREL)
This adds support for parsing and emitting the SBREL relocation variant for the ARM target. Handling this relocation variant is necessary for s
ARM: add support for segment base relocations (SBREL)
This adds support for parsing and emitting the SBREL relocation variant for the ARM target. Handling this relocation variant is necessary for supporting the full ARM ELF specification. Addresses PR22128.
llvm-svn: 225595
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#
b68fa3b5 |
| 09-Jan-2015 |
Saleem Abdulrasool <compnerd@compnerd.org> |
ARM: add support for R_ARM_ABS16
Add support for R_ARM_ABS16 relocation mapping. Addresses PR22156.
llvm-svn: 225510
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#
3c0f78a2 |
| 09-Jan-2015 |
Saleem Abdulrasool <compnerd@compnerd.org> |
ARM: add support for R_ARM_ABS8 relocations
Add support for R_ARM_ABS8 relocation. Addresses PR22126.
llvm-svn: 225507
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Revision tags: llvmorg-3.5.1, llvmorg-3.5.1-rc2 |
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#
fb60e77f |
| 11-Dec-2014 |
Kumar Sukhani <kumarsukhani@gmail.com> |
test commit (spelling correction)
llvm-svn: 224007
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Revision tags: llvmorg-3.5.1-rc1 |
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#
5b9f3522 |
| 20-Nov-2014 |
Jyoti Allur <jyoti.allur@samsung.com> |
[ELF] Prevent ARM ELF object writer from generating deprecated relocation code R_ARM_PLT32
llvm-svn: 222414
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Revision tags: llvmorg-3.5.0, llvmorg-3.5.0-rc4, llvmorg-3.5.0-rc3, llvmorg-3.5.0-rc2, llvmorg-3.5.0-rc1 |
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#
46797c69 |
| 20-Jul-2014 |
Ulrich Weigand <ulrich.weigand@de.ibm.com> |
[MC] Pass MCSymbolData to needsRelocateWithSymbol
As discussed in a previous checking to support the .localentry directive on PowerPC, we need to inspect the actual target symbol in needsRelocateWit
[MC] Pass MCSymbolData to needsRelocateWithSymbol
As discussed in a previous checking to support the .localentry directive on PowerPC, we need to inspect the actual target symbol in needsRelocateWithSymbol to make the appropriate decision based on that symbol's st_other bits.
Currently, needsRelocateWithSymbol does not get the target symbol. However, it is directly available to its sole caller. This patch therefore simply extends the needsRelocateWithSymbol by a new parameter "const MCSymbolData &SD", passes in the target symbol, and updates all derived implementations.
In particular, in the PowerPC implementation, this patch removes the FIXME added by the previous checkin.
llvm-svn: 213487
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Revision tags: llvmorg-3.4.2, llvmorg-3.4.2-rc1 |
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#
3d082fa5 |
| 03-May-2014 |
Rafael Espindola <rafael.espindola@gmail.com> |
Fix pr19645.
The fix itself is fairly simple: move getAccessVariant to MCValue so that we replace the old weak expression evaluation with the far more general EvaluateAsRelocatable.
This then requi
Fix pr19645.
The fix itself is fairly simple: move getAccessVariant to MCValue so that we replace the old weak expression evaluation with the far more general EvaluateAsRelocatable.
This then requires that EvaluateAsRelocatable stop when it finds a non trivial reference kind. And that in turn requires the ELF writer to look harder for weak references.
Last but not least, this found a case where we were being bug by bug compatible with gas and accepting an invalid input. I reported pr19647 to track it.
llvm-svn: 207920
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#
dd18d5b0 |
| 29-Apr-2014 |
Joerg Sonnenberger <joerg@bec.de> |
Parse and create GOT_PREL relocations.
llvm-svn: 207526
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Revision tags: llvmorg-3.4.1, llvmorg-3.4.1-rc2, llvmorg-3.4.1-rc1 |
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#
5904e12b |
| 29-Mar-2014 |
Rafael Espindola <rafael.espindola@gmail.com> |
Completely rewrite ELFObjectWriter::RecordRelocation.
I started trying to fix a small issue, but this code has seen a small fix too many.
The old code was fairly convoluted. Some of the issues it h
Completely rewrite ELFObjectWriter::RecordRelocation.
I started trying to fix a small issue, but this code has seen a small fix too many.
The old code was fairly convoluted. Some of the issues it had:
* It failed to check if a symbol difference was in the some section when converting a relocation to pcrel. * It failed to check if the relocation was already pcrel. * The pcrel value computation was wrong in some cases (relocation-pc.s) * It was missing quiet a few cases where it should not convert symbol relocations to section relocations, leaving the backends to patch it up. * It would not propagate the fact that it had changed a relocation to pcrel, requiring a quiet nasty work around in ARM. * It was missing comments.
llvm-svn: 205076
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#
2a111609 |
| 28-Mar-2014 |
Christian Pirker <cpirker@a-bix.com> |
Add ARM big endian Target (armeb, thumbeb)
Reviewed at http://llvm-reviews.chandlerc.com/D3095
llvm-svn: 205007
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#
c03f44ca |
| 27-Mar-2014 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove another unused argument.
llvm-svn: 204961
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#
9ab38012 |
| 27-Mar-2014 |
Rafael Espindola <rafael.espindola@gmail.com> |
Remove unused argument.
llvm-svn: 204956
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#
7fadc0ea |
| 20-Mar-2014 |
Rafael Espindola <rafael.espindola@gmail.com> |
Look through variables when computing relocations.
Given
bar = foo + 4 .long bar
MC would eat the 4. GNU as includes it in the relocation. The rule seems to be that a variable that defines a symb
Look through variables when computing relocations.
Given
bar = foo + 4 .long bar
MC would eat the 4. GNU as includes it in the relocation. The rule seems to be that a variable that defines a symbol is used in the relocation and one that does not define a symbol is evaluated and the result included in the relocation.
Fixing this unfortunately required some other changes:
* Since the variable is now evaluated, it would prevent the ELF writer from noticing the weakref marker the elf streamer uses. This patch then replaces that with a VariantKind in MCSymbolRefExpr.
* Using VariantKind then requires us to look past other VariantKind to see
.weakref bar,foo call bar@PLT
doing this also fixes
zed = foo +2 call zed@PLT
so that is a good thing.
* Looking past VariantKind means that the relocation selection has to use the fixup instead of the target.
This is a reboot of the previous fixes for MC. I will watch the sanitizer buildbot and wait for a build before adding back the previous fixes.
llvm-svn: 204294
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#
ca7e3e5c |
| 10-Mar-2014 |
Craig Topper <craig.topper@gmail.com> |
[C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203439
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#
56e06e86 |
| 30-Jan-2014 |
Saleem Abdulrasool <compnerd@compnerd.org> |
ARM: suuport .tlsdescseq directive
This enhances the ARMAsmParser to handle .tlsdescseq directives. This is a slightly special relocation. We must be able to generate them, but not consume them in
ARM: suuport .tlsdescseq directive
This enhances the ARMAsmParser to handle .tlsdescseq directives. This is a slightly special relocation. We must be able to generate them, but not consume them in assembly. The relocation is meant to assist the linker in generating a TLS descriptor sequence. The ELF target streamer is enhanced to append additional fixups into the current segment and that is used to emit the new R_ARM_TLS_DESCSEQ relocations.
llvm-svn: 200448
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#
a3f12bde |
| 30-Jan-2014 |
Saleem Abdulrasool <compnerd@compnerd.org> |
ARM: support TLS descriptor relocations
Add support for tlsdesc relocations which are part of the ABI, marked as experimental. These relocations permit the linker to perform TLS reference optimizat
ARM: support TLS descriptor relocations
Add support for tlsdesc relocations which are part of the ABI, marked as experimental. These relocations permit the linker to perform TLS reference optimizations.
llvm-svn: 200447
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#
6e00ca88 |
| 30-Jan-2014 |
Saleem Abdulrasool <compnerd@compnerd.org> |
ARM: support tlscall relocations
This adds support for TLS CALL relocations. TLS CALL relocations are used to indicate to the linker to generate appropriate entries to resolve TLS references via an
ARM: support tlscall relocations
This adds support for TLS CALL relocations. TLS CALL relocations are used to indicate to the linker to generate appropriate entries to resolve TLS references via an appropriate function invocation (e.g. __tls_get_addr(PLT)).
In order to accomodate the linker relaxation of the TLS access model for the references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete. This requires that the partial inplace value is also incomplete (i.e. 0). We simply avoid the offset value calculation at the time of the fixup adjustment in the ARM assembler backend.
llvm-svn: 200446
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#
e51c8138 |
| 20-Jan-2014 |
Kai Nacke <kai.nacke@redstar.de> |
ARM: add tlsldo relocation
Add support for the symbol(tlsldo) relocation. This is required in order to solve PR18554.
Reviewed by R. Golin, A. Korobeynikov.
llvm-svn: 199644
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Revision tags: llvmorg-3.4.0, llvmorg-3.4.0-rc3 |
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#
8ad70b35 |
| 04-Dec-2013 |
David Peixotto <dpeixott@codeaurora.org> |
Add support for parsing ARM symbol variants on ELF targets
ARM symbol variants are written with parens instead of @ like this:
.word __GLOBAL_I_a(target1)
This commit adds support for parsing th
Add support for parsing ARM symbol variants on ELF targets
ARM symbol variants are written with parens instead of @ like this:
.word __GLOBAL_I_a(target1)
This commit adds support for parsing these symbol variants in expressions. We introduce a new flag to MCAsmInfo that indicates the parser should use parens to parse the symbol variant. The expression parser is modified to look for symbol variants using parens instead of @ when the corresponding MCAsmInfo flag is true.
The MCAsmInfo parens flag is enabled only for ARM on ELF.
By adding this flag to MCAsmInfo, we are able to get rid of redundant ARM-specific symbol variants and use the generic variants instead (e.g. VK_GOT instead of VK_ARM_GOT). We use the new UseParensForSymbolVariant attribute in MCAsmInfo to correctly print the symbol variants for arm.
To achive this we need to keep a handle to the MCAsmInfo in the MCSymbolRefExpr class that we can check when printing the symbol variant.
Updated Tests: Changed case of symbol variant to match the generic kind. test/CodeGen/ARM/tls-models.ll test/CodeGen/ARM/tls1.ll test/CodeGen/ARM/tls2.ll test/CodeGen/Thumb2/tls1.ll test/CodeGen/Thumb2/tls2.ll
PR18080
llvm-svn: 196424
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Revision tags: llvmorg-3.4.0-rc2, llvmorg-3.4.0-rc1, llvmorg-3.3.1-rc1, llvmorg-3.3.0, llvmorg-3.3.0-rc3, llvmorg-3.3.0-rc2, llvmorg-3.3.0-rc1 |
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#
1bd90ff6 |
| 30-Jan-2013 |
Jack Carter <jcarter@mips.com> |
This patch reworks how llvm targets set and update ELF header e_flags.
Currently gathering information such as symbol, section and data is done by collecting it in an MCAssembler object. From MCA
This patch reworks how llvm targets set and update ELF header e_flags.
Currently gathering information such as symbol, section and data is done by collecting it in an MCAssembler object. From MCAssembler and MCAsmLayout objects ELFObjectWriter::WriteObject() forms and streams out the ELF object file.
This patch just adds a few members to the MCAssember class to store and access the e_flag settings. It allows for runtime additions to the e_flag by assembler directives. The standalone assembler can get to MCAssembler from getParser().getStreamer().getAssembler().
This patch is the generic infrastructure and will be followed by patches for ARM and Mips for their target specific use.
Contributer: Jack Carter llvm-svn: 173882
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Revision tags: llvmorg-3.2.0 |
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#
4dd14fb5 |
| 12-Dec-2012 |
Logan Chien <tzuhsiang.chien@gmail.com> |
Add ARM NONE and PREL31 relocation types.
Add R_ARM_NONE and R_ARM_PREL31 relocation types to MCExpr. Both of them will be used while generating .ARM.extab and .ARM.exidx sections.
llvm-svn: 169965
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