#
2946cd70 |
| 19-Jan-2019 |
Chandler Carruth <chandlerc@gmail.com> |
Update the file headers across all of the LLVM projects in the monorepo to reflect the new license.
We understand that people may be surprised that we're moving the header entirely to discuss the ne
Update the file headers across all of the LLVM projects in the monorepo to reflect the new license.
We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach.
Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository.
llvm-svn: 351636
show more ...
|
#
bf4fdecc |
| 08-Jan-2019 |
Petr Pavlu <petr.pavlu@arm.com> |
[GlobalISel] Fix choice of instruction selector for AArch64 at -O0 with -global-isel=0
Commit rL347861 introduced an unintentional change in the behaviour when compiling for AArch64 at -O0 with -glo
[GlobalISel] Fix choice of instruction selector for AArch64 at -O0 with -global-isel=0
Commit rL347861 introduced an unintentional change in the behaviour when compiling for AArch64 at -O0 with -global-isel=0. Previously, explicitly disabling GlobalISel resulted in using FastISel but an updated condition in the commit changed it to using SelectionDAG. The patch fixes this condition and slightly better organizes the code that chooses the instruction selector.
Fixes PR40131.
Differential Revision: https://reviews.llvm.org/D56266
llvm-svn: 350626
show more ...
|
#
43153024 |
| 04-Dec-2018 |
Matt Arsenault <Matthew.Arsenault@amd.com> |
MIR: Add method to stop after specific runs of passes
Currently if you use -{start,stop}-{before,after}, it picks the first instance with the matching pass name. If you run the same pass multiple ti
MIR: Add method to stop after specific runs of passes
Currently if you use -{start,stop}-{before,after}, it picks the first instance with the matching pass name. If you run the same pass multiple times, there's no way to distinguish them.
Allow specifying a run index wih ,N to specify which you mean.
llvm-svn: 348285
show more ...
|
#
e6406d56 |
| 29-Nov-2018 |
Petr Pavlu <petr.pavlu@arm.com> |
[GlobalISel] Make EnableGlobalISel always set when GISel is enabled
Change meaning of TargetOptions::EnableGlobalISel. The flag was previously set only when a target switched on GlobalISel but it is
[GlobalISel] Make EnableGlobalISel always set when GISel is enabled
Change meaning of TargetOptions::EnableGlobalISel. The flag was previously set only when a target switched on GlobalISel but it is now always set when the GlobalISel pipeline is enabled. This makes the flag consistent with TargetOptions::EnableFastISel and allows its use in other parts of the compiler to determine when GlobalISel is enabled.
The EnableGlobalISel flag had previouly only one use in TargetPassConfig::isGlobalISelAbortEnabled(). The method used its value to determine if GlobalISel was enabled by a target and returned false in such a case. To preserve the current behaviour, a new flag TargetOptions::GlobalISelAbort is introduced to separately record the abort behaviour.
Differential Revision: https://reviews.llvm.org/D54518
llvm-svn: 347861
show more ...
|
#
86f8b70f |
| 09-Nov-2018 |
Serge Guelton <sguelton@quarkslab.com> |
Type safe version of MachinePassRegistry
Previous version used type erasure through a `void* (*)()` pointer, which triggered gcc warning and implied a lot of reinterpret_cast.
This version should m
Type safe version of MachinePassRegistry
Previous version used type erasure through a `void* (*)()` pointer, which triggered gcc warning and implied a lot of reinterpret_cast.
This version should make it harder to hit ourselves in the foot.
Differential revision: https://reviews.llvm.org/D54203
llvm-svn: 346522
show more ...
|
#
e8f717ae |
| 02-Nov-2018 |
Matthias Braun <matze@braunis.de> |
LLVMTargetMachine/TargetPassConfig: Simplify handling of start/stop options; NFC
- Make some TargetPassConfig methods that just check whether options have been set static. - Shuffle code in LLVMTa
LLVMTargetMachine/TargetPassConfig: Simplify handling of start/stop options; NFC
- Make some TargetPassConfig methods that just check whether options have been set static. - Shuffle code in LLVMTargetMachine around so addPassesToGenerateCode only deals with TargetPassConfig now (but not with MCContext or the creation of MachineModuleInfo)
llvm-svn: 345918
show more ...
|
#
85d3f1ee |
| 30-Oct-2018 |
Francis Visoiu Mistrih <francisvm@yahoo.com> |
[llc] Error out when -print-machineinstrs is used with an unknown pass
We used to assert instead of reporting an error.
PR39494
llvm-svn: 345589
|
#
10dedc00 |
| 03-Oct-2018 |
Daniel Sanders <daniel_l_sanders@apple.com> |
Correct implementation of -verify-machineinstrs such that it's still overridable for EXPENSIVE_CHECKS
-verify-machineinstrs was implemented as a simple bool. As a result, the 'VerifyMachineCode == c
Correct implementation of -verify-machineinstrs such that it's still overridable for EXPENSIVE_CHECKS
-verify-machineinstrs was implemented as a simple bool. As a result, the 'VerifyMachineCode == cl::BOU_UNSET' used by EXPENSIVE_CHECKS to make it on by default but possible to disable didn't work as intended. Changed -verify-machineinstrs to a boolOrDefault to correct this.
llvm-svn: 343696
show more ...
|
#
74de21d0 |
| 02-Oct-2018 |
Daniel Sanders <daniel_l_sanders@apple.com> |
[globalisel][verifier] Run the MachineVerifier from IRTranslator onwards
-verify-machineinstrs inserts the MachineVerifier after every MachineInstr-based pass. However, GlobalISel creates MachineIns
[globalisel][verifier] Run the MachineVerifier from IRTranslator onwards
-verify-machineinstrs inserts the MachineVerifier after every MachineInstr-based pass. However, GlobalISel creates MachineInstr-based passes earlier than DAGISel and the corresponding verifiers are not being added. This patch fixes that.
If GlobalISel triggers the fallback path then the MIR can be left in a bad state that is going to be cleared by ResetMachineFunctions. In this situation verifying between GlobalISel passes will prevent the fallback path from recovering from this. As a result, we bail out of verifying a function if the FailedISel attribute is present.
llvm-svn: 343613
show more ...
|
Revision tags: llvmorg-7.0.0, llvmorg-7.0.0-rc3, llvmorg-7.0.0-rc2, llvmorg-7.0.0-rc1 |
|
#
f78650a8 |
| 30-Jul-2018 |
Fangrui Song <maskray@google.com> |
Remove trailing space
sed -Ei 's/[[:space:]]+$//' include/**/*.{def,h,td} lib/**/*.{cpp,h}
llvm-svn: 338293
|
#
8bda1881 |
| 30-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
[MachineOutliner] Add support for target-default outlining.
This adds functionality to the outliner that allows targets to specify certain functions that should be outlined from by default.
If a ta
[MachineOutliner] Add support for target-default outlining.
This adds functionality to the outliner that allows targets to specify certain functions that should be outlined from by default.
If a target supports default outlining, then it specifies that in its TargetOptions. In the case that it does, and the user hasn't specified that they *never* want to outline, the outliner will be added to the pass pipeline and will run on those default functions.
This is a preliminary patch for turning the outliner on by default under -Oz for AArch64.
https://reviews.llvm.org/D48776
llvm-svn: 336040
show more ...
|
#
79917b96 |
| 29-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
[MachineOutliner] Add always and never options to -enable-machine-outliner
This is a recommit of r335887, which was erroneously committed earlier.
To enable the MachineOutliner by default on AArch6
[MachineOutliner] Add always and never options to -enable-machine-outliner
This is a recommit of r335887, which was erroneously committed earlier.
To enable the MachineOutliner by default on AArch64, we need to be able to disable the MachineOutliner and also provide an option to "always" enable the outliner.
This adds that capability. It allows the user to still use the old -enable-machine-outliner option, which defaults to "always". This is building up to allowing the user to specify "always" versus the target default outlining behaviour.
https://reviews.llvm.org/D48682
llvm-svn: 335986
show more ...
|
#
0c5d3ffb |
| 28-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
[MachineOutliner] Never add the outliner in -O0
This is a recommit of r335879.
We shouldn't add the outliner when compiling at -O0 even if -enable-machine-outliner is passed in. This makes sure tha
[MachineOutliner] Never add the outliner in -O0
This is a recommit of r335879.
We shouldn't add the outliner when compiling at -O0 even if -enable-machine-outliner is passed in. This makes sure that we don't add it in this case.
This also removes -O0 from the outliner DWARF test.
llvm-svn: 335930
show more ...
|
#
dafa198c |
| 28-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
[MachineOutliner] Define MachineOutliner support in TargetOptions
Targets should be able to define whether or not they support the outliner without the outliner being added to the pass pipeline. Bef
[MachineOutliner] Define MachineOutliner support in TargetOptions
Targets should be able to define whether or not they support the outliner without the outliner being added to the pass pipeline. Before this, the outliner pass would be added, and ask the target whether or not it supports the outliner.
After this, it's possible to query the target in TargetPassConfig, before the outliner pass is created. This ensures that passing -enable-machine-outliner will not modify the pass pipeline of any target that does not support it.
https://reviews.llvm.org/D48683
llvm-svn: 335887
show more ...
|
#
d6261bef |
| 28-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
Revert "[MachineOutliner] Add always and never options to -enable-machine-outliner"
I accidentally committed this instead of D48683 because I haven't had coffee yet.
llvm-svn: 335883
|
#
f3a44fe8 |
| 28-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
Revert "[MachineOutliner] Never add the outliner in -O0"
This reverts commit 9c7c10e4073a0bc6a759ce5cd33afbac74930091.
It relies on r335872 since that introduces the machine outliner flags test. I
Revert "[MachineOutliner] Never add the outliner in -O0"
This reverts commit 9c7c10e4073a0bc6a759ce5cd33afbac74930091.
It relies on r335872 since that introduces the machine outliner flags test. I meant to commit D48683 in that commit, but got mixed up and committed D48682 instead. So, I'm reverting this and r335872, since D48682 hasn't made it through review yet.
llvm-svn: 335882
show more ...
|
#
c9d67526 |
| 28-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
[MachineOutliner] Never add the outliner in -O0
We shouldn't add the outliner when compiling at -O0 even if -enable-machine-outliner is passed in. This makes sure that we don't add it in this case.
[MachineOutliner] Never add the outliner in -O0
We shouldn't add the outliner when compiling at -O0 even if -enable-machine-outliner is passed in. This makes sure that we don't add it in this case.
This also updates machine-outliner-flags to reflect the change and improves the comment describing what that test does.
llvm-svn: 335879
show more ...
|
#
1ccb66c5 |
| 28-Jun-2018 |
Jessica Paquette <jpaquette@apple.com> |
[MachineOutliner] Add always and never options to -enable-machine-outliner
To enable the MachineOutliner by default on AArch64, we need to be able to disable the MachineOutliner and also provide an
[MachineOutliner] Add always and never options to -enable-machine-outliner
To enable the MachineOutliner by default on AArch64, we need to be able to disable the MachineOutliner and also provide an option to "always" enable the outliner.
This adds that capability. It allows the user to still use the old -enable-machine-outliner option, which defaults to "always". This is building up to allowing the user to specify "always" versus the target-default outlining behaviour.
llvm-svn: 335872
show more ...
|
Revision tags: llvmorg-6.0.1, llvmorg-6.0.1-rc3, llvmorg-6.0.1-rc2 |
|
#
99d60e0d |
| 31-May-2018 |
Heejin Ahn <aheejin@gmail.com> |
[WebAssembly] Add Wasm exception handling prepare pass
Summary: This adds a pass that transforms a program to be prepared for Wasm exception handling. This is using Windows EH instructions and based
[WebAssembly] Add Wasm exception handling prepare pass
Summary: This adds a pass that transforms a program to be prepared for Wasm exception handling. This is using Windows EH instructions and based on the previous Wasm EH proposal. (https://github.com/WebAssembly/exception-handling/blob/master/proposals/Exceptions.md)
Reviewers: dschuff, majnemer
Subscribers: jfb, mgorny, sbc100, jgravelle-google, JDevlieghere, sunfish, llvm-commits
Differential Revision: https://reviews.llvm.org/D43746
llvm-svn: 333696
show more ...
|
#
1eca23bd |
| 19-Apr-2018 |
Jessica Paquette <jpaquette@apple.com> |
[MachineOutliner] NFC: Move EnableLinkOnceODROutlining into MachineOutliner.cpp
This moves the EnableLinkOnceODROutlining flag from TargetPassConfig.cpp into MachineOutliner.cpp. It also removes Out
[MachineOutliner] NFC: Move EnableLinkOnceODROutlining into MachineOutliner.cpp
This moves the EnableLinkOnceODROutlining flag from TargetPassConfig.cpp into MachineOutliner.cpp. It also removes OutlineFromLinkOnceODRs from the MachineOutliner constructor. This is now handled by the moved command-line flag.
llvm-svn: 330373
show more ...
|
Revision tags: llvmorg-6.0.1-rc1, llvmorg-5.0.2, llvmorg-5.0.2-rc2 |
|
#
a373d18e |
| 28-Mar-2018 |
David Blaikie <dblaikie@gmail.com> |
Transforms: Introduce Transforms/Utils.h rather than spreading the declarations amongst Scalar.h and IPO.h
Fixes layering - Transforms/Utils shouldn't depend on including a Scalar or IPO header, bec
Transforms: Introduce Transforms/Utils.h rather than spreading the declarations amongst Scalar.h and IPO.h
Fixes layering - Transforms/Utils shouldn't depend on including a Scalar or IPO header, because Scalar and IPO depend on Utils.
llvm-svn: 328717
show more ...
|
#
2ecb7ba4 |
| 22-Mar-2018 |
Jun Bum Lim <junbuml@codeaurora.org> |
[CodeGen] Add a new pass for PostRA sink
Summary: This pass sinks COPY instructions into a successor block, if the COPY is not used in the current block and the COPY is live-in to a single successor
[CodeGen] Add a new pass for PostRA sink
Summary: This pass sinks COPY instructions into a successor block, if the COPY is not used in the current block and the COPY is live-in to a single successor (i.e., doesn't require the COPY to be duplicated). This avoids executing the the copy on paths where their results aren't needed. This also exposes additional opportunites for dead copy elimination and shrink wrapping.
These copies were either not handled by or are inserted after the MachineSink pass. As an example of the former case, the MachineSink pass cannot sink COPY instructions with allocatable source registers; for AArch64 these type of copy instructions are frequently used to move function parameters (PhyReg) into virtual registers in the entry block..
For the machine IR below, this pass will sink %w19 in the entry into its successor (%bb.1) because %w19 is only live-in in %bb.1.
``` %bb.0: %wzr = SUBSWri %w1, 1 %w19 = COPY %w0 Bcc 11, %bb.2 %bb.1: Live Ins: %w19 BL @fun %w0 = ADDWrr %w0, %w19 RET %w0 %bb.2: %w0 = COPY %wzr RET %w0 ``` As we sink %w19 (CSR in AArch64) into %bb.1, the shrink-wrapping pass will be able to see %bb.0 as a candidate.
With this change I observed 12% more shrink-wrapping candidate and 13% more dead copies deleted in spec2000/2006/2017 on AArch64.
Reviewers: qcolombet, MatzeB, thegameg, mcrosier, gberry, hfinkel, john.brawn, twoh, RKSimon, sebpop, kparzysz
Reviewed By: sebpop
Subscribers: evandro, sebpop, sfertile, aemerson, mgorny, javed.absar, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D41463
llvm-svn: 328237
show more ...
|
#
6d047b70 |
| 19-Mar-2018 |
Clement Courbet <courbet@google.com> |
[MergeICmps] Re-land 324317 "Enable the MergeICmps Pass by default."
Now that PR36557 is fixed.
llvm-svn: 327840
|
Revision tags: llvmorg-5.0.2-rc1 |
|
#
c6638c81 |
| 02-Mar-2018 |
Clement Courbet <courbet@google.com> |
[MergeICmps] Revert 324317 "Enable the MergeICmps Pass by default."
While working on PR36557.
llvm-svn: 326575
|
Revision tags: llvmorg-6.0.0 |
|
#
9f9e4681 |
| 28-Feb-2018 |
Chih-Hung Hsieh <chh@google.com> |
[TLS] use emulated TLS if the target supports only this mode
Emulated TLS is enabled by llc flag -emulated-tls, which is passed by clang driver. When llc is called explicitly or from other drivers l
[TLS] use emulated TLS if the target supports only this mode
Emulated TLS is enabled by llc flag -emulated-tls, which is passed by clang driver. When llc is called explicitly or from other drivers like LTO, missing -emulated-tls flag would generate wrong TLS code for targets that supports only this mode. Now use useEmulatedTLS() instead of Options.EmulatedTLS to decide whether emulated TLS code should be generated. Unit tests are modified to run with and without the -emulated-tls flag.
Differential Revision: https://reviews.llvm.org/D42999
llvm-svn: 326341
show more ...
|