Add a bool flag to StackObjects telling whether they reference spill
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument va

Add a bool flag to StackObjects telling whether they reference spill
slots. The AsmPrinter will use this information to determine whether to
print a spill/reload comment.

Remove default argument values. It's too easy to pass a wrong argument
value when multiple arguments have default values. Make everything
explicit to trap bugs early.

Update all targets to adhere to the new interfaces..

llvm-svn: 87022

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When the function is doing dynamic stack realignment, the spill slot will be
indexed via the stack pointer, even if a frame pointer is present. Update the
heuristic to place it nearest the stack poin

When the function is doing dynamic stack realignment, the spill slot will be
indexed via the stack pointer, even if a frame pointer is present. Update the
heuristic to place it nearest the stack pointer in that case, rather than
nearest the frame pointer.

llvm-svn: 85474

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Cleanup of frame index scavenging. Better code flow and more accurately
handles T2 and ARM use cases.

llvm-svn: 84761

Better handle instructions that re-def a scratch register

llvm-svn: 84657

Register re-use for scavenged frame indices must check for re-deginition
of the register in the instruction which kills the scavenged value.

llvm-svn: 84641

Enable post-pass frame index register scavenging for ARM and Thumb2

llvm-svn: 84585

Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues.

llvm-svn: 84326

Make loop not recalc getNumOperands() each time around

llvm-svn: 84138

quiet compiler warning

llvm-svn: 84133

when previous scratch register is killed, flag the value as no longer tracking

llvm-svn: 83653

Re-enable register scavenging in Thumb1 by default.

llvm-svn: 83521

bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that.

llvm-svn: 83519

reverting thumb1 scavenging default due to test failure while I figure out what's up.

llvm-svn: 83501

Enable thumb1 register scavenging by default.

llvm-svn: 83496

grammar

llvm-svn: 83483

add initializers for clarity. Add missing assignment of PrevLastUseOp.

llvm-svn: 83481

Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. Whe

Add register-reuse to frame-index register scavenging. When a target uses
a virtual register to eliminate a frame index, it can return that register
and the constant stored there to PEI to track. When scavenging to allocate
for those registers, PEI then tracks the last-used register and value, and
if it is still available and matches the value for the next index, reuses
the existing value rather and removes the re-materialization instructions.
Fancier tracking and adjustment of scavenger allocations to keep more
values live for longer is possible, but not yet implemented and would likely
be better done via a different, less special-purpose, approach to the
problem.

eliminateFrameIndex() is modified so the target implementations can return
the registers they wish to be tracked for reuse.

ARM Thumb1 implements and utilizes the new mechanism. All other targets are
simply modified to adjust for the changed eliminateFrameIndex() prototype.

llvm-svn: 83467

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Add additional assert() to verify no extraneous use of a scavenged register.

llvm-svn: 83163

replace TRI->isVirtualRegister() with TargetRegisterInfo::isVirtualRegister()
per customary usage

llvm-svn: 83137

fix compiler warning

llvm-svn: 83132

Simplify the tracking of virtual frame index registers. Ranges cannot overlap,
so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are

Simplify the tracking of virtual frame index registers. Ranges cannot overlap,
so a simple "current register" will suffice. Also add some additional
sanity-checking assertions to make sure things are as we expect.

llvm-svn: 83081

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Use explicit structs instead of std::pair to map callee saved regs to spill slots.

llvm-svn: 82909

pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned. For the o

pr4926: ARM requires the stack pointer to be aligned, even for leaf functions.
For the AAPCS ABI, SP must always be 4-byte aligned, and at any "public
interface" it must be 8-byte aligned. For the older ARM APCS ABI, the stack
alignment is just always 4 bytes. For X86, we currently align SP at
entry to a function (e.g., to 16 bytes for Darwin), but no stack alignment
is needed at other times, such as for a leaf function.

After discussing this with Dan, I decided to go with the approach of adding
a new "TransientStackAlignment" field to TargetFrameInfo. This value
specifies the stack alignment that must be maintained even in between calls.
It defaults to 1 except for ARM, where it is 4. (Some other targets may
also want to set this if they have similar stack requirements. It's not
currently required for PPC because it sets targetHandlesStackFrameRounding
and handles the alignment in target-specific code.) The existing StackAlignment
value specifies the alignment upon entry to a function, which is how we've
been using it anyway.

llvm-svn: 82767

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Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving
interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as nee

Start of revamping the register scavenging in PEI. ARM Thumb1 is the driving
interest for this, as it currently reserves a register rather than using
the scavenger for matierializing constants as needed.

Instead of scavenging registers on the fly while eliminating frame indices,
new virtual registers are created, and then a scavenged collectively in a
post-pass over the function. This isolates the bits that need to interact
with the scavenger, and sets the stage for more intelligent use, and reuse,
of scavenged registers.

For the time being, this is disabled by default. Once the bugs are worked out,
the current scavenging calls in replaceFrameIndices() will be removed and
the post-pass scavenging will be the default. Until then,
-enable-frame-index-scavenging enables the new code. Currently, only the
Thumb1 back end is set up to use it.

llvm-svn: 82734

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Fix a hypothetical problem for targets with StackGrowsUp and a non-zero
LocalAreaOffset. (We don't have any of those right now.)
PEI::calculateFrameObjectOffsets includes the absolute value of the
L

Fix a hypothetical problem for targets with StackGrowsUp and a non-zero
LocalAreaOffset. (We don't have any of those right now.)
PEI::calculateFrameObjectOffsets includes the absolute value of the
LocalAreaOffset in the cumulative offset value used to calculate the
stack frame size. It then adds the raw value of the LocalAreaOffset
to the stack size. For a StackGrowsDown target, that raw value is negative
and has the effect of cancelling out the absolute value that was added
earlier, but that obviously won't work for a StackGrowsUp target. Change
to subtract the absolute value of the LocalAreaOffset.

llvm-svn: 82693

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