History log of /llvm-project/llvm/lib/CodeGen/GlobalISel/LegalityPredicates.cpp (Results 1 – 25 of 28)
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Revision tags: llvmorg-21-init, llvmorg-19.1.7, llvmorg-19.1.6, llvmorg-19.1.5
# d3ce0695 23-Nov-2024 David Green <david.green@arm.com>

[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)

This converts all ptr element shuffle vectors to s64, so that the
existing vector legalization handling can lower them as needed.

[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)

This converts all ptr element shuffle vectors to s64, so that the
existing vector legalization handling can lower them as needed. This
prevents a lot of fallbacks that currently try to generate things like
`<2 x ptr> G_EXT`.

I'm not sure if bitcast/inttoptr/ptrtoint is intended to be necessary
for vectors of pointers, but it uses buildCast for the casts, which now
generates a ptrtoint/inttoptr.

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Revision tags: llvmorg-19.1.4
# 8e377274 01-Nov-2024 Thorsten Schütt <schuett@gmail.com>

[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE (#114470)

There are patterns for:
* {nxv2s32, s32, s64},
* {nxv4s16, s16, s64},
* {nxv2s16, s16, s64}


# 6effab99 31-Oct-2024 Thorsten Schütt <schuett@gmail.com>

Revert "[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE" (#114353)

Reverts llvm/llvm-project#114310


# 6bf214b7 31-Oct-2024 Thorsten Schütt <schuett@gmail.com>

[GlobalISel][AArch64] Legalize G_INSERT_VECTOR_ELT for SVE (#114310)

There are patterns for:
* {nxv2s32, s32, s64},
* {nxv4s16, s16, s64},
* {nxv2s16, s16, s64}


Revision tags: llvmorg-19.1.3, llvmorg-19.1.2, llvmorg-19.1.1, llvmorg-19.1.0, llvmorg-19.1.0-rc4, llvmorg-19.1.0-rc3, llvmorg-19.1.0-rc2
# a0d8fa5d 31-Jul-2024 Jiahan Xie <88367305+jiahanxie353@users.noreply.github.com>

[RISCV][GlobalISel] Legalize Scalable Vector Loads and Stores (#84965)

This patch supports legalizing load and store instruction for scalable
vectors in RISCV


Revision tags: llvmorg-19.1.0-rc1, llvmorg-20-init, llvmorg-18.1.8, llvmorg-18.1.7, llvmorg-18.1.6, llvmorg-18.1.5, llvmorg-18.1.4, llvmorg-18.1.3, llvmorg-18.1.2, llvmorg-18.1.1, llvmorg-18.1.0, llvmorg-18.1.0-rc4, llvmorg-18.1.0-rc3, llvmorg-18.1.0-rc2, llvmorg-18.1.0-rc1, llvmorg-19-init, llvmorg-17.0.6, llvmorg-17.0.5, llvmorg-17.0.4, llvmorg-17.0.3, llvmorg-17.0.2, llvmorg-17.0.1, llvmorg-17.0.0, llvmorg-17.0.0-rc4, llvmorg-17.0.0-rc3, llvmorg-17.0.0-rc2, llvmorg-17.0.0-rc1, llvmorg-18-init, llvmorg-16.0.6, llvmorg-16.0.5, llvmorg-16.0.4, llvmorg-16.0.3, llvmorg-16.0.2, llvmorg-16.0.1, llvmorg-16.0.0, llvmorg-16.0.0-rc4, llvmorg-16.0.0-rc3
# 7e6e636f 16-Feb-2023 Kazu Hirata <kazu@google.com>

Use llvm::has_single_bit<uint32_t> (NFC)

This patch replaces isPowerOf2_32 with llvm::has_single_bit<uint32_t>
where the argument is wider than uint32_t.


Revision tags: llvmorg-16.0.0-rc2, llvmorg-16.0.0-rc1, llvmorg-17-init, llvmorg-15.0.7, llvmorg-15.0.6, llvmorg-15.0.5, llvmorg-15.0.4, llvmorg-15.0.3, working, llvmorg-15.0.2, llvmorg-15.0.1, llvmorg-15.0.0, llvmorg-15.0.0-rc3, llvmorg-15.0.0-rc2, llvmorg-15.0.0-rc1, llvmorg-16-init, llvmorg-14.0.6, llvmorg-14.0.5, llvmorg-14.0.4, llvmorg-14.0.3, llvmorg-14.0.2, llvmorg-14.0.1
# d1f97a34 10-Apr-2022 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Add memSizeNotByteSizePow2 legality helper

This is really a replacement for memSizeInBytesNotPow2 that actually
does what most every target wants. In particular, since s1 rounds to 1
byt

GlobalISel: Add memSizeNotByteSizePow2 legality helper

This is really a replacement for memSizeInBytesNotPow2 that actually
does what most every target wants. In particular, since s1 rounds to 1
byte, it wasn't lowered by this predicate. This results in targets
needing to think harder and add more matchers to catch all the
degenerate cases.

Also small bug fix that prevented the correct insertion of
G_ASSERT_ZEXT in the AArch64 use case.

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Revision tags: llvmorg-14.0.0, llvmorg-14.0.0-rc4, llvmorg-14.0.0-rc3, llvmorg-14.0.0-rc2, llvmorg-14.0.0-rc1, llvmorg-15-init, llvmorg-13.0.1, llvmorg-13.0.1-rc3, llvmorg-13.0.1-rc2, llvmorg-13.0.1-rc1, llvmorg-13.0.0, llvmorg-13.0.0-rc4, llvmorg-13.0.0-rc3
# 6c4b634d 07-Sep-2021 Mirko Brkusanin <Mirko.Brkusanin@amd.com>

[AMDGPU][GlobalISel] Legalize G_MUL for non-standard types

Legalizing G_MUL for non-standard types (like i33) generated an error. Putting
minScalar and maxScalar instead of clampScalar. Also using n

[AMDGPU][GlobalISel] Legalize G_MUL for non-standard types

Legalizing G_MUL for non-standard types (like i33) generated an error. Putting
minScalar and maxScalar instead of clampScalar. Also using new rule, instead
of widening to the next power of 2, widen to the next multiple of the passed
argument (32 in this case), so instead of widening i65 to i128, we widen it to
i96.

Patch by: Mateja Marjanovic

Differential Revision: https://reviews.llvm.org/D109228

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Revision tags: llvmorg-13.0.0-rc2, llvmorg-13.0.0-rc1, llvmorg-14-init, llvmorg-12.0.1, llvmorg-12.0.1-rc4, llvmorg-12.0.1-rc3, llvmorg-12.0.1-rc2
# 28f2f662 09-Jun-2021 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Use LLT in memory legality queries

This enables proper lowering of non-byte sized loads. We still aren't
faithfully preserving memory types everywhere, so the legality checks
still only

GlobalISel: Use LLT in memory legality queries

This enables proper lowering of non-byte sized loads. We still aren't
faithfully preserving memory types everywhere, so the legality checks
still only consider the size.

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Revision tags: llvmorg-12.0.1-rc1, llvmorg-12.0.0, llvmorg-12.0.0-rc5, llvmorg-12.0.0-rc4, llvmorg-12.0.0-rc3, llvmorg-12.0.0-rc2, llvmorg-11.1.0, llvmorg-11.1.0-rc3, llvmorg-12.0.0-rc1, llvmorg-13-init, llvmorg-11.1.0-rc2, llvmorg-11.1.0-rc1
# df812115 24-Dec-2020 Kazu Hirata <kazu@google.com>

[CodeGen, Transforms] Use llvm::any_of (NFC)


Revision tags: llvmorg-11.0.1, llvmorg-11.0.1-rc2, llvmorg-11.0.1-rc1, llvmorg-11.0.0, llvmorg-11.0.0-rc6, llvmorg-11.0.0-rc5, llvmorg-11.0.0-rc4, llvmorg-11.0.0-rc3
# 2c73bef7 10-Sep-2020 Reid Kleckner <rnk@google.com>

Fix wrong comment about enabling optimizations to work around a bug


# 4e3edef4 10-Sep-2020 Reid Kleckner <rnk@google.com>

Use pragmas to work around MSVC x86_32 debug miscompile bug

Halide users reported this here: https://llvm.org/pr46176
I reported the issue to MSVC here:
https://developercommunity.visualstudio.com/c

Use pragmas to work around MSVC x86_32 debug miscompile bug

Halide users reported this here: https://llvm.org/pr46176
I reported the issue to MSVC here:
https://developercommunity.visualstudio.com/content/problem/1179643/msvc-copies-overaligned-non-trivially-copyable-par.html

This codepath is apparently not covered by LLVM's unit tests, so I added
coverage in a unit test.

If we want to support this configuration going forward, it means that is
in general not safe to pass a SmallVector<T, N> by value if alignof(T)
is greater than 4. This doesn't appear to come up often because passing
a SmallVector by value is inefficient and not idiomatic: it copies the
inline storage. In this case, the SmallVector<LLT,4> is captured by
value by a lambda, and the lambda is passed by value into std::function,
and that's how we hit the bug.

Differential Revision: https://reviews.llvm.org/D87475

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Revision tags: llvmorg-11.0.0-rc2, llvmorg-11.0.0-rc1
# 902cbcd5 24-Jul-2020 Kazu Hirata <kazu@google.com>

Use llvm::is_contained where appropriate (NFC)

Summary:
This patch replaces std::find with llvm::is_contained where
appropriate.

Reviewers: efriedma, nhaehnle

Reviewed By: nhaehnle

Subscribers: a

Use llvm::is_contained where appropriate (NFC)

Summary:
This patch replaces std::find with llvm::is_contained where
appropriate.

Reviewers: efriedma, nhaehnle

Reviewed By: nhaehnle

Subscribers: arsenm, jvesely, nhaehnle, hiraditya, rogfer01, kerbowa, llvm-commits, vkmr

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D84489

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Revision tags: llvmorg-12-init, llvmorg-10.0.1, llvmorg-10.0.1-rc4, llvmorg-10.0.1-rc3, llvmorg-10.0.1-rc2
# e13c84c3 23-May-2020 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Work on improving stock set of legality predicates

I get confused by a lot of the predicate names here, since I would
assume they apply to vectors as well. Rename to reflect they only
ap

GlobalISel: Work on improving stock set of legality predicates

I get confused by a lot of the predicate names here, since I would
assume they apply to vectors as well. Rename to reflect they only
apply to scalars.

Also add a few predicates AMDGPU uses that should be generally useful.
Also add any() to complement all. I've wanted to use this a few times
but then worked around it not being there.

show more ...


# ef3e8312 23-May-2020 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Basic legalization for G_PTRMASK


Revision tags: llvmorg-10.0.1-rc1, llvmorg-10.0.0, llvmorg-10.0.0-rc6, llvmorg-10.0.0-rc5, llvmorg-10.0.0-rc4, llvmorg-10.0.0-rc3, llvmorg-10.0.0-rc2, llvmorg-10.0.0-rc1, llvmorg-11-init, llvmorg-9.0.1, llvmorg-9.0.1-rc3, llvmorg-9.0.1-rc2, llvmorg-9.0.1-rc1, llvmorg-9.0.0, llvmorg-9.0.0-rc6, llvmorg-9.0.0-rc5, llvmorg-9.0.0-rc4, llvmorg-9.0.0-rc3, llvmorg-9.0.0-rc2, llvmorg-9.0.0-rc1, llvmorg-10-init, llvmorg-8.0.1, llvmorg-8.0.1-rc4, llvmorg-8.0.1-rc3, llvmorg-8.0.1-rc2, llvmorg-8.0.1-rc1, llvmorg-8.0.0, llvmorg-8.0.0-rc5, llvmorg-8.0.0-rc4, llvmorg-8.0.0-rc3
# 530d05e9 14-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Add alignment to LegalityQuery MMOs

This allows targets to specify the minimum alignment required for the
load/store.

llvm-svn: 354071


Revision tags: llvmorg-7.1.0, llvmorg-7.1.0-rc1
# 91be65be 07-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Try to make legalize rules more useful for vectors

Mostly keep the existing functions on scalars, but add versions which
also operate based on the vector element size.

llvm-svn: 353430


Revision tags: llvmorg-8.0.0-rc2
# 07238286 04-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Fix moreElementsToNextPow2

This was completely broken. The condition was inverted, and changed
the element type for vectors of pointers.

Fixes bug 40592.

llvm-svn: 353069


# cbaada6b 02-Feb-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Legalization for inttoptr/ptrtoint

llvm-svn: 352973


# 990f5077 25-Jan-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Add convenience mutatations to scalarize

llvm-svn: 352143


Revision tags: llvmorg-8.0.0-rc1
# a5195829 20-Jan-2019 Matt Arsenault <Matthew.Arsenault@amd.com>

GlobalISel: Add isPointer legality predicates

llvm-svn: 351699


# 2946cd70 19-Jan-2019 Chandler Carruth <chandlerc@gmail.com>

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the ne

Update the file headers across all of the LLVM projects in the monorepo
to reflect the new license.

We understand that people may be surprised that we're moving the header
entirely to discuss the new license. We checked this carefully with the
Foundation's lawyer and we believe this is the correct approach.

Essentially, all code in the project is now made available by the LLVM
project under our new license, so you will see that the license headers
include that license only. Some of our contributors have contributed
code under our old license, and accordingly, we have retained a copy of
our old license notice in the top-level files in each project and
repository.

llvm-svn: 351636

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Revision tags: llvmorg-7.0.1, llvmorg-7.0.1-rc3, llvmorg-7.0.1-rc2, llvmorg-7.0.1-rc1
# f87473fe 25-Oct-2018 Volkan Keles <vkeles@apple.com>

[GISel] LegalizerInfo: Rename MemDesc::Size to SizeInBits to make the value clearer

Requested in D53679.

llvm-svn: 345288


Revision tags: llvmorg-7.0.0, llvmorg-7.0.0-rc3, llvmorg-7.0.0-rc2, llvmorg-7.0.0-rc1
# bdeb880d 27-Jun-2018 Daniel Sanders <daniel_l_sanders@apple.com>

[globalisel][legalizer] Add AtomicOrdering to LegalityQuery and use it in AArch64

Now that we have the ability to legalize based on MMO's. Add support for
legalizing based on AtomicOrdering and use

[globalisel][legalizer] Add AtomicOrdering to LegalityQuery and use it in AArch64

Now that we have the ability to legalize based on MMO's. Add support for
legalizing based on AtomicOrdering and use it to correct the legalization
of the atomic instructions.

Also extend all() to be a variadic template as this ruleset now requires
3 and 4 argument versions.

llvm-svn: 335767

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Revision tags: llvmorg-6.0.1, llvmorg-6.0.1-rc3, llvmorg-6.0.1-rc2
# 4f246999 27-Apr-2018 Daniel Sanders <daniel_l_sanders@apple.com>

Attempt to fix remaining build failures after r331071 by changing the tuple to a struct

Some of the bots were failing in a different way to the others. These were
unable to compare tuples. Fix this

Attempt to fix remaining build failures after r331071 by changing the tuple to a struct

Some of the bots were failing in a different way to the others. These were
unable to compare tuples. Fix this by changing to a struct, thereby avoiding
the quirks of tuples.

llvm-svn: 331081

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