[BOLT] Remove unsupported ELF type reloc handling

Drop unsupported ELF format reloc handling -- RewriteInstance lacks
this flexibility elsewhere.

Reviewed By: rafauler

Differential Revision: https

[BOLT] Remove unsupported ELF type reloc handling

Drop unsupported ELF format reloc handling -- RewriteInstance lacks
this flexibility elsewhere.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D148946

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[BOLT] Remove unneeded dyncasts

These checks are unnecessary -- we've already bailed if the format was wrong.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D148848

[BOLT][NFC] Move phdr typedef to cpp file

This typedef is only used inside the RewriteInstance source file, let's not
expose it in the header file -- even if private.

Differential Revision: https:/

[BOLT][NFC] Move phdr typedef to cpp file

This typedef is only used inside the RewriteInstance source file, let's not
expose it in the header file -- even if private.

Differential Revision: https://reviews.llvm.org/D148667

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[BOLT] Adjust Shdr alignment

Shdr's are not necesarily size 2^n, and there is no reason to align to
that boundary if they are.

Differential Revision: https://reviews.llvm.org/D148666

[BOLT] Fix use-after-free in RewriteInstance::mapCodeSections

When a cold function is too large, its section gets deregistered.
However, the section is still dereferenced later to get its RuntimeDyl

[BOLT] Fix use-after-free in RewriteInstance::mapCodeSections

When a cold function is too large, its section gets deregistered.
However, the section is still dereferenced later to get its RuntimeDyld
ID. This patch moves the deregistration to after the last dereference.

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D148427

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[BOLT] Reject symbols pointing to section end

Sometimes, symbols are present that point to the end of a section (i.e.,
one-past the highest valid address). Currently, BOLT either rejects
those symbo

[BOLT] Reject symbols pointing to section end

Sometimes, symbols are present that point to the end of a section (i.e.,
one-past the highest valid address). Currently, BOLT either rejects
those symbols when they don't point to another existing section, or errs
when they do and the other section is not executable. I suppose BOLT
would accept the symbol when it points to an executable section.

In any case, these symbols should not be considered while discovering
functions and should not result in an error. This patch implements that.

Note that this patch checks explicitly for symbols whose value equals
the end of their section. It might make more sense to verify that the
symbol's value is within [section start, section end). However, I'm not
sure if this could every happen *and* its value does not equal the end.

Another way to implement this is to verify that the BinarySection we
find at the symbol's address actually corresponds to the symbol's
section. I'm not sure what the best approach is so feedback is welcome.

Reviewed By: yota9, rafauler

Differential Revision: https://reviews.llvm.org/D146215

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[BOLT] Add .relr.dyn section support

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D146085

Use *{Map,Set}::contains (NFC)

[BOLT] Add writable segment for allocatable sections

The golang support creates 2 new data segments, one of them contains
relocations in PIC binaries, so the section must have writable rights.
Curre

[BOLT] Add writable segment for allocatable sections

The golang support creates 2 new data segments, one of them contains
relocations in PIC binaries, so the section must have writable rights.
Currently BOLT creates only one new segment that contains new sections
with RX rights, now also create RW segment if there are any new writable
sections were allocated during BOLT binary processing.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D143390

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[BOLT] Improve dynamic relocations support for CI

This patch fixes few problems with supporting dynamic relocations in CI.
1. After dynamic relocations and functions were read search for dynamic
rel

[BOLT] Improve dynamic relocations support for CI

This patch fixes few problems with supporting dynamic relocations in CI.
1. After dynamic relocations and functions were read search for dynamic
relocations located in functions. Currently we expected them only to be
relative and only to be in constant island. Mark islands of such
functions to have dynamic relocations and create CI access symbol on the
relocation offset, so the BD would be created for such place.
2. During function disassemble and handling address reference for
constant island check if the referred external CI has dynamic
relocation. And if it has one we would continue to refer original CI
rather then creating a local copy.
3. After function disassembly stage mark function that has dynamic reloc
in CI as non-simple. We don't want such functions to be optimized, since
such passes as split function would create 2 copies of CI which we
unable to support currently.
4. During updating output values for BF search for BD located in CI and
update their output locations.
5. On dynamic relocation patching stage search for binary data located
on relocation offset. If it was moved use new relocation offset value
rather then an old one.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D143748

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[BOLT] Process fragment siblings in lite mode, keep lite mode on

In lite mode, include split function fragments to the list of functions to
process even if a fragment has no samples. This is require

[BOLT] Process fragment siblings in lite mode, keep lite mode on

In lite mode, include split function fragments to the list of functions to
process even if a fragment has no samples. This is required to properly
detect and update split jump tables (jump tables that contain pointers to code
in the main and cold fragments).

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D140457

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[BOLT] Search section based on relocation symbol

We need to search referenced section based on relocations symbol section
to properly match end section symbols. For example on some binaries we
can o

[BOLT] Search section based on relocation symbol

We need to search referenced section based on relocations symbol section
to properly match end section symbols. For example on some binaries we
can observe that init_array_end/fini_array_end might be "placed" in to
the gap and since no section could be found for address the relocation
would be skipped resulting in wrong ADRP imm after emitting new text
resulting in binary sigsegv.

Credits for the test to Vladislav Khmelevskii aka yota9.

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[BOLT] Reintroduce allow-stripped

Reject stripped binaries as a policy.

The core issue with stripped binaries is that we can't detect the presence
of split functions which require extra handling. T

[BOLT] Reintroduce allow-stripped

Reject stripped binaries as a policy.

The core issue with stripped binaries is that we can't detect the presence
of split functions which require extra handling. Therefore BOLT can't ensure
functional correctness of produced binary if the input stripped binary contains
split functions. Supporting such cases is an interesting problem but it goes
against BOLT's intended goal of achieving peak program performance.

Reviewed By: maksfb

Differential Revision: https://reviews.llvm.org/D142686

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[BOLT][NFC] Rename {MachO,}RewriteInstance::create methods

Follow the code style of fallible constructors in [LLVM Programmer's Manual]
(https://llvm.org/docs/ProgrammersManual.html#fallible-constru

[BOLT][NFC] Rename {MachO,}RewriteInstance::create methods

Follow the code style of fallible constructors in [LLVM Programmer's Manual]
(https://llvm.org/docs/ProgrammersManual.html#fallible-constructors)
and rename `RewriteInstance::createRewriteInstance` to `RewriteInstance::create`

Reviewed By: #bolt, rafauler

Differential Revision: https://reviews.llvm.org/D143119

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[BOLT][NFC] Use llvm::make_second_range

Reviewed By: #bolt, rafauler

Differential Revision: https://reviews.llvm.org/D143019

[BOLT] Use LTO fuzzy name matching in function-order

Allow partial name matching wrt LTO suffixes in `function-order`
user-supplied function list, the same as permitted by profile matching.

Reviewe

[BOLT] Use LTO fuzzy name matching in function-order

Allow partial name matching wrt LTO suffixes in `function-order`
user-supplied function list, the same as permitted by profile matching.

Reviewed By: #bolt, rafauler

Differential Revision: https://reviews.llvm.org/D142269

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[BOLT][NFC] Replace ambiguous BinarySection::isReadOnly with isWritable

Address feedback in https://reviews.llvm.org/D102284#2755060

Reviewed By: yota9

Differential Revision: https://reviews.llvm.

[BOLT][NFC] Replace ambiguous BinarySection::isReadOnly with isWritable

Address feedback in https://reviews.llvm.org/D102284#2755060

Reviewed By: yota9

Differential Revision: https://reviews.llvm.org/D141733

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[BOLT][NFC] Simplify handleRelocation

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D132089

[BOLT] Use std::optional instead of llvm::Optional (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue

[BOLT] Use std::optional instead of llvm::Optional (NFC)

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

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[BOLT] Respect -function-order in lite mode

Process functions listed in -function-order file even in lite mode.

Reviewed By: #bolt, maksfb

Differential Revision: https://reviews.llvm.org/D140435

[BOLT][AArch64] Handle adrp+ld64 linker relaxations

Linker might relax adrp + ldr got address loading to adrp + add for
local non-preemptible symbols (e.g. hidden/protected symbols in
executable). A

[BOLT][AArch64] Handle adrp+ld64 linker relaxations

Linker might relax adrp + ldr got address loading to adrp + add for
local non-preemptible symbols (e.g. hidden/protected symbols in
executable). As usually linker doesn't change relocations properly after
relaxation, so we have to handle such cases by ourselves. To do that
during relocations reading we change LD64 reloc to ADD if instruction
mismatch found and introduce FixRelaxationPass that searches for ADRP+ADD
pairs and after performing some checks we're replacing ADRP target symbol
to already fixed ADDs one.

Vladislav Khmelevsky,
Advanced Software Technology Lab, Huawei

Differential Revision: https://reviews.llvm.org/D138097

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[BOLT][NFC] Remove unused PrintInstructions argument

PrintInstructions was unused in BinaryFunction::print() and dump().

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D140440

[BOLT][NFC] Use std::optional in has*NameRegex

[BOLT][NFC] Use std::optional in RI

[BOLT] Use std::nullopt instead of None (NFC)

This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated. The intent is to reduce
the amount of ma

[BOLT] Use std::nullopt instead of None (NFC)

This patch mechanically replaces None with std::nullopt where the
compiler would warn if None were deprecated. The intent is to reduce
the amount of manual work required in migrating from Optional to
std::optional.

This is part of an effort to migrate from llvm::Optional to
std::optional:

https://discourse.llvm.org/t/deprecating-llvm-optional-x-hasvalue-getvalue-getvalueor/63716

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