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74dc3754 |
| 09-Dec-2017 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
em/emx: Sync with Intel's em 7.6.2
- Fix RX filter settings when exiting promiscous mode. - Add workaround for I219 resetting. - Fix some settings for 82574.
Tested-by: dillon@ (I219)
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fec28316 |
| 30-Oct-2017 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Free tx mbufs proactively.
This is preparation for the dillon's upcoming sendfile patch.
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53d76a93 |
| 26-May-2017 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Use ringmap to do polling cpu assignment and fill redirect table.
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81ac62f7 |
| 25-Nov-2015 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
em/emx: Integrate ifmedia flow control support.
Other minor bits: - Set media to IFM_NONE, if there is no link yet. - Remove no longer used dev.em.Y.flow_ctrl sysctl node. ifconfig emY [mediaopt|-
em/emx: Integrate ifmedia flow control support.
Other minor bits: - Set media to IFM_NONE, if there is no link yet. - Remove no longer used dev.em.Y.flow_ctrl sysctl node. ifconfig emY [mediaopt|-mediaopt] [rxpause|txpause|forcepause] should be used instead.
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212c030e |
| 20-Nov-2015 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Support flow control change and default to RX pause
Tested-by: dillon@
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26595b18 |
| 28-Nov-2014 |
Sascha Wildner <saw@online.de> |
kernel: Use the new auto-created sysctl ctx/tree in various drivers.
Everywhere where we formerly rolled a hw.fooX.* per-device ctx/tree ourselves.
This commit switches it to dev.foo.X.*
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a5807b81 |
| 04-Sep-2013 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Add I217/I218
According to the datasheet, these two chips support 2 RX queues at least.
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55471c55 |
| 16-Feb-2013 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
em/emx: Avoid using magic number for TX register writing aggregation
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d84018e9 |
| 07-Feb-2013 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Implement multiple hardware TX queue support; disabled by default
Two notes about the multiple hardware TX queue support:
- It could only be enabled on 82571, 82572 and es2lan. Enabling it on
emx: Implement multiple hardware TX queue support; disabled by default
Two notes about the multiple hardware TX queue support:
- It could only be enabled on 82571, 82572 and es2lan. Enabling it on 82574, whose datasheet claims multiple hardware TX queue support, could cause watchdog timeout when heavy TCP receiving test are conducted.
- It is disabled by default. Since 82571, 82572 and es2lan only have one global context for TX hardware checksum and TSO, the driver will have to setup TX context descriptor for each packet. Using TX context descriptor for each packet could cause serious transmission performance regression for tiny packets, see comment of following commit: 51e6819fc2ad7cefdf830dcc9f20bcbe2af2aa52
However, multiple hardware TX queues still could be enabled depending on the workload (*): o TSO probably are not affected by setting up a TX context descriptor for each TSO packet. o Stuffs do not using hardware TX checksum, e.g. IP fast forwarding.
Multiple hardware TX queues could be enabled globally by tunable: hw.emx.txr=2 Multiple hardware TX queues could be enabled on individual interface by tunable: hw.emxY.txr=2
(*) Another thought is to add per-interface metric, which indicates the size of packets that worth hardware checksum; if the packets' size is below that metric, software checksum is used.
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7f32a9b0 |
| 22-Nov-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Don't update TDT upon very packets transmitted
The TDT is updated only after certain amount of TX descriptors are added to the hardware TX ring. The default value of the amount of TX descripto
emx: Don't update TDT upon very packets transmitted
The TDT is updated only after certain amount of TX descriptors are added to the hardware TX ring. The default value of the amount of TX descriptors are 8. This value could be further tuned by per-device sysctl node hw.emxX.tx_wreg_nsegs.
CPU usage when transmitting 18bytes tiny UDP datagrams @1.48Mpps with 82571 on AMD970 (3500Mhz) are reduced from 50% to 30% with the default value.
Inspired-by: FreeBSD netmap's paper
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ec1c60bb |
| 14-Oct-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Group TX related fields into emx_txdata; use it in TX related functions
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9f831fa8 |
| 12-Oct-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Pass emx_rxdata to RX related functions
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ec1092aa |
| 12-Oct-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Remove unused statistics
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09f49d52 |
| 22-Sep-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Allow user to specify RX/TX processing CPU's offset
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de0836d4 |
| 14-Aug-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Pack boolean fields into flags
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b1e3f139 |
| 08-Aug-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Increase spare TX descriprors to 33 incorporate TSO segment
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3245f71e |
| 02-Aug-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
em/emx: Reduce the default interrupt rate to 6000Hz
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0c0e1638 |
| 01-Aug-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Add EMX_TSO_DEBUG
It is used to measure TSO context reuse rate. Setting up TX context interferes TX data fetching pipelining, thus reduces performance, so TX context setting up should be avoid
emx: Add EMX_TSO_DEBUG
It is used to measure TSO context reuse rate. Setting up TX context interferes TX data fetching pipelining, thus reduces performance, so TX context setting up should be avoided as much as possible.
According to limited measurement: - 1 one direction TX stream, reuse rate is ~40% - 16 one direction TX streams, reuse rate is ~20% - 16 bi-direction streams (total 32), reuse rate is ~10%
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3eb0ea09 |
| 01-Aug-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Add TSO support
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8a6680ca |
| 01-Aug-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Remove unused macros
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68447568 |
| 01-Aug-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Utilize mbuf's header lengthes
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4cb541ae |
| 07-Jul-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Fix "Missing Interrupt Following ICR read" errata
IMS should be set to 0 before reading ICR. It should be noted that once IMS is 0, ICR.INT_ASSERTED will not be set, which is not mentioned in
emx: Fix "Missing Interrupt Following ICR read" errata
IMS should be set to 0 before reading ICR. It should be noted that once IMS is 0, ICR.INT_ASSERTED will not be set, which is not mentioned in the datasheet.
This errata exists on 82571, 82572, 82573, 82574 and 82583, while 82583 is not covered by emx(4). And the fix is needed only if the legacy interrupt is used and the interrupt line is shared with other devices.
hw.emxX.irq.unshared tunable is added to give a hint to the driver that the legacy interrupt is not shared with other devices.
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13890b61 |
| 16-Apr-2012 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Change how IFCAP_RSS is handled
- Number of RX rings being used is not changed. - Hardware is always setup w/ RSS support. - If IFCAP_RSS is not enabled, we simply don't use the RSS hash provid
emx: Change how IFCAP_RSS is handled
- Number of RX rings being used is not changed. - Hardware is always setup w/ RSS support. - If IFCAP_RSS is not enabled, we simply don't use the RSS hash provided by the hardware.
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7fb43956 |
| 28-Dec-2011 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
pci: Factor out pci_alloc_1intr()
This function will properly setup rid and flags for "legacy" interrupt. If MSI is enabled, then this function will try allocate 1 MSI message and setup rid and flag
pci: Factor out pci_alloc_1intr()
This function will properly setup rid and flags for "legacy" interrupt. If MSI is enabled, then this function will try allocate 1 MSI message and setup rid and flags properly for MSI based interrupt resource.
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704b6287 |
| 27-Dec-2011 |
Sepherosa Ziehau <sephe@dragonflybsd.org> |
emx: Use MSI, if device supports it
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